| Line 72... |
Line 72... |
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/* Setup the timer to generate the tick interrupts. */
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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static void prvSetupTimerInterrupt( void );
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/* For writing into SPR. */
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/* For writing into SPR. */
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static inline void mtspr(unsigned long spr, unsigned long value) {
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static inline void mtspr(unsigned long spr, unsigned long value)
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{
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asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
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asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
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}
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}
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/* For reading SPR. */
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/* For reading SPR. */
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static inline unsigned long mfspr(unsigned long spr) {
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static inline unsigned long mfspr(unsigned long spr)
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{
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unsigned long value;
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unsigned long value;
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asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
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asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
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return value;
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return value;
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}
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}
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inline void vPortDisableInterrupts( void )
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/* forward decleation */
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{
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inline void vPortDisableInterrupts( void );
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mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt stop
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inline void vPortEnableInterrupts( void );
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}
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inline void vPortEnableInterrupts( void )
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{
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mtspr(SPR_SR, mfspr(SPR_SR) | (SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt start
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}
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/*
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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* portSAVE_CONTEXT had been called. Context layout is described in
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* portmarco.h
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*
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*
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* See header file for description.
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* See header file for description.
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*/
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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{
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unsigned portLONG uTaskSR = mfspr(SPR_SR);
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unsigned portLONG uTaskSR = mfspr(SPR_SR);
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uTaskSR |= SPR_SR_SM; // Supervisor mode
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uTaskSR |= SPR_SR_SM; // Supervisor mode
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uTaskSR |= (SPR_SR_TEE | SPR_SR_IEE); // Tick interrupt enable, All External interupt enable
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uTaskSR |= (SPR_SR_TEE | SPR_SR_IEE); // Tick interrupt enable, All External interupt enable
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// allocate redzone
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pxTopOfStack -= REDZONE_SIZE/4;
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/* Setup the initial stack of the task. The stack is set exactly as
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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expected by the portRESTORE_CONTEXT() macro. */
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*(--pxTopOfStack) = (portSTACK_TYPE)pxCode; // SPR_EPCR_BASE(0)
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*(--pxTopOfStack) = (portSTACK_TYPE)pxCode; // SPR_EPCR_BASE(0)
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*(--pxTopOfStack) = (portSTACK_TYPE)uTaskSR; // SPR_ESR_BASE(0)
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*(--pxTopOfStack) = (portSTACK_TYPE)uTaskSR; // SPR_ESR_BASE(0)
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| Line 153... |
Line 152... |
/* Start the timer that generates the tick ISR. Interrupts are disabled
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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here already. */
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prvSetupTimerInterrupt();
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prvSetupTimerInterrupt();
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/* Start the first task. */
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/* Start the first task. */
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portRESTORE_CONTEXT();
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asm volatile (
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" .global pxCurrentTCB \n\t"
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/* restore stack pointer */
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" l.movhi r3, hi(pxCurrentTCB) \n\t"
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" l.ori r3, r3, lo(pxCurrentTCB) \n\t"
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" l.lwz r3, 0x0(r3) \n\t"
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" l.lwz r1, 0x0(r3) \n\t"
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/* restore context */
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" l.lwz r9, 0x00(r1) \n\t"
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" l.lwz r2, 0x04(r1) \n\t"
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" l.lwz r6, 0x14(r1) \n\t"
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" l.lwz r7, 0x18(r1) \n\t"
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" l.lwz r8, 0x1C(r1) \n\t"
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" l.lwz r10, 0x20(r1) \n\t"
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" l.lwz r11, 0x24(r1) \n\t"
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" l.lwz r12, 0x28(r1) \n\t"
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" l.lwz r13, 0x2C(r1) \n\t"
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" l.lwz r14, 0x30(r1) \n\t"
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" l.lwz r15, 0x34(r1) \n\t"
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" l.lwz r16, 0x38(r1) \n\t"
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" l.lwz r17, 0x3C(r1) \n\t"
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" l.lwz r18, 0x40(r1) \n\t"
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" l.lwz r19, 0x44(r1) \n\t"
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" l.lwz r20, 0x48(r1) \n\t"
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" l.lwz r21, 0x4C(r1) \n\t"
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" l.lwz r22, 0x50(r1) \n\t"
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" l.lwz r23, 0x54(r1) \n\t"
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" l.lwz r24, 0x58(r1) \n\t"
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" l.lwz r25, 0x5C(r1) \n\t"
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" l.lwz r26, 0x60(r1) \n\t"
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" l.lwz r27, 0x64(r1) \n\t"
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" l.lwz r28, 0x68(r1) \n\t"
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" l.lwz r29, 0x6C(r1) \n\t"
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" l.lwz r30, 0x70(r1) \n\t"
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" l.lwz r31, 0x74(r1) \n\t"
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/* restore SPR_ESR_BASE(0), SPR_EPCR_BASE(0) */
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" l.lwz r3, 0x78(r1) \n\t"
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" l.lwz r4, 0x7C(r1) \n\t"
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" l.mtspr r0, r3, %1 \n\t"
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" l.mtspr r0, r4, %2 \n\t"
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/* restore clobber register */
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" l.lwz r3, 0x08(r1) \n\t"
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" l.lwz r4, 0x0C(r1) \n\t"
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" l.lwz r5, 0x10(r1) \n\t"
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" l.addi r1, r1, %0 \n\t"
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" l.rfe \n\t"
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" l.nop \n\t"
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:
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: "n"(STACKFRAME_SIZE),
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"n"(SPR_ESR_BASE),
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"n"(SPR_EPCR_BASE)
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);
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/* Should not get here! */
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/* Should not get here! */
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} else {
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} else {
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/* Retrun by vPortEndScheduler */
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/* Retrun by vPortEndScheduler */
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}
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}
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| Line 192... |
Line 242... |
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// set OR1200 to accept exceptions
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// set OR1200 to accept exceptions
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
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}
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}
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|
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inline void vPortDisableInterrupts( void )
|
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{
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mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt stop
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}
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|
|
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inline void vPortEnableInterrupts( void )
|
|
{
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mtspr(SPR_SR, mfspr(SPR_SR) | (SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt start
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}
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|
|
/*
|
/*
|
* naked attribute is ignored or32-elf-gcc 4.5.1-or32-1.0rc1
|
* naked attribute is ignored or32-elf-gcc 4.5.1-or32-1.0rc1
|
* use assemble routines in portasm.S
|
* use assemble routines in portasm.S
|
*/
|
*/
|
#if 0
|
#if 0
|
