| Line 83... |
Line 83... |
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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|
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#define portYIELD_FROM_ISR() vTaskSwitchContext()
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#define portYIELD_FROM_ISR() vTaskSwitchContext()
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#define portYIELD() { \
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#define portYIELD() { \
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__asm__ __volatile__ ( "l.addi r1, r1, -4" ); \
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__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \
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__asm__ __volatile__ ( "l.sw 0x0(r1), r11" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCC" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCC" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCC" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCC" ); \
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__asm__ __volatile__ ( "l.nop " ); \
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__asm__ __volatile__ ( "l.nop " ); \
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}
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}
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#define portNOP() __asm__ __volatile__ ( "l.nop" )
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#define portNOP() __asm__ __volatile__ ( "l.nop" )
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| Line 113... |
Line 112... |
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|
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// Critical section handling.
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// Critical section handling.
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// switch supervisormode, disable tick interrupt and all external interrupt, switch back usermode
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// switch supervisormode, disable tick interrupt and all external interrupt, switch back usermode
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#define portENTER_CRITICAL() { \
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#define portENTER_CRITICAL() { \
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__asm__ __volatile__ ( "l.addi r1, r1, -4" ); \
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__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \
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__asm__ __volatile__ ( "l.sw 0x0(r1), r11" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCE" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCE" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCE" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCE" ); \
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__asm__ __volatile__ ( "l.nop " ); \
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__asm__ __volatile__ ( "l.nop " ); \
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}
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}
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|
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// switch supervisormode, enable tick interrupt and all external interrupt, switch back usermode
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// switch supervisormode, enable tick interrupt and all external interrupt, switch back usermode
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#define portEXIT_CRITICAL() { \
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#define portEXIT_CRITICAL() { \
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__asm__ __volatile__ ( "l.addi r1, r1, -4" ); \
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__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \
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__asm__ __volatile__ ( "l.sw 0x0(r1), r11" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCF" ); \
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__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCF" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCF" ); \
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__asm__ __volatile__ ( "l.sys 0x0FCF" ); \
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__asm__ __volatile__ ( "l.nop " ); \
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__asm__ __volatile__ ( "l.nop " ); \
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}
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}
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|
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| Line 142... |
Line 139... |
// Macro to save all registers, stack pointer into the TCB.
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// Macro to save all registers, stack pointer into the TCB.
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#define portSAVE_CONTEXT() \
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#define portSAVE_CONTEXT() \
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asm volatile ( \
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asm volatile ( \
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" .global pxCurrentTCB \n\t" \
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" .global pxCurrentTCB \n\t" \
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" # make rooms in stack \n\t" \
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" # make rooms in stack \n\t" \
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" l.addi r1, r1, -132 \n\t" \
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" l.addi r1, r1, -128 \n\t" \
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" # early save r3-r5, these are clobber register\n\t" \
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" # early save r3-r5, these are clobber register\n\t" \
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" l.sw 0x08(r1), r3 \n\t" \
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" l.sw 0x08(r1), r3 \n\t" \
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" l.sw 0x0C(r1), r4 \n\t" \
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" l.sw 0x0C(r1), r4 \n\t" \
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" l.sw 0x10(r1), r5 \n\t" \
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" l.sw 0x10(r1), r5 \n\t" \
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" # save SPR_ESR_BASE(0), SPR_EPCR_BASE(0)\n\t" \
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" # save SPR_ESR_BASE(0), SPR_EPCR_BASE(0)\n\t" \
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| Line 238... |
Line 235... |
" l.mtspr r0, r4, (0<<11) + 32 \n\t" \
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" l.mtspr r0, r4, (0<<11) + 32 \n\t" \
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" # restore clobber register \n\t" \
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" # restore clobber register \n\t" \
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" l.lwz r3, 0x08(r1) \n\t" \
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" l.lwz r3, 0x08(r1) \n\t" \
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" l.lwz r4, 0x0C(r1) \n\t" \
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" l.lwz r4, 0x0C(r1) \n\t" \
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" l.lwz r5, 0x10(r1) \n\t" \
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" l.lwz r5, 0x10(r1) \n\t" \
|
|
" l.addi r1, r1, 128 \n\t" \
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" l.rfe \n\t" \
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" l.rfe \n\t" \
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" l.nop \n\t" \
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" l.nop \n\t" \
|
);
|
);
|
|
|
#endif /* PORTMACRO_H */
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#endif /* PORTMACRO_H */
|
