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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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2011-05-17 Stefan Kristiansson
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* ucos-port/os_cpu_c.c:
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(OSTaskStkInit): Use ICE and DCE from current SR instead of
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default to disable.
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2011-04-20 Julius Baxter
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2011-04-20 Julius Baxter
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* ucos-port/os_cpu_c.c:
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* ucos-port/os_cpu_c.c:
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(OSTaskStkInit): Made stack initialisation skip red zone (128 bytes).
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(OSTaskStkInit): Made stack initialisation skip red zone (128 bytes).
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* ucos-port/os_cpu_a.S:
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* ucos-port/os_cpu_a.S:
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(UserISR): Fix register used on entry. (submitted by user keviny)
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(UserISR): Fix register used on entry. (submitted by user keviny)
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