URL
https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 21 |
Rev 24 |
Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: or1200_defines.v,v $
|
// $Log: or1200_defines.v,v $
|
|
// Revision 1.2 2010/02/15 19:26:03 kenagy
|
|
// no message
|
|
//
|
// Revision 1.1 2009/03/25 22:16:56 kenagy
|
// Revision 1.1 2009/03/25 22:16:56 kenagy
|
// no message
|
// no message
|
//
|
//
|
// Revision 1.1 2009/02/19 23:49:39 kenagy
|
// Revision 1.1 2009/02/19 23:49:39 kenagy
|
// no message
|
// no message
|
Line 1151... |
Line 1154... |
// Tick Timer (TT)
|
// Tick Timer (TT)
|
//
|
//
|
|
|
// Define it if you want TT implemented
|
// Define it if you want TT implemented
|
// `define OR1200_TT_IMPLEMENTED -- qaz
|
// `define OR1200_TT_IMPLEMENTED -- qaz
|
|
`define OR1200_TT_IMPLEMENTED
|
|
|
// Address offsets of TT registers inside TT group
|
// Address offsets of TT registers inside TT group
|
`define OR1200_TT_OFS_TTMR 1'd0
|
`define OR1200_TT_OFS_TTMR 1'd0
|
`define OR1200_TT_OFS_TTCR 1'd1
|
`define OR1200_TT_OFS_TTCR 1'd1
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.