| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.7.4.2 2003/12/04 23:44:31 lampret
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// Static exception prefix.
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//
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// Revision 1.7.4.1 2003/07/08 15:36:37 lampret
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// Revision 1.7.4.1 2003/07/08 15:36:37 lampret
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// Added embedded memory QMEM.
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// Added embedded memory QMEM.
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//
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//
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// Revision 1.7 2003/04/20 22:23:57 lampret
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// Revision 1.7 2003/04/20 22:23:57 lampret
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// No functional change. Only added customization for exception vectors.
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// No functional change. Only added customization for exception vectors.
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| Line 274... |
Line 277... |
`ifdef OR1200_VERBOSE
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`ifdef OR1200_VERBOSE
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// synopsys translate_off
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// synopsys translate_off
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$display("Starting exception: %h.", except_type);
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$display("Starting exception: %h.", except_type);
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// synopsys translate_on
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// synopsys translate_on
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`endif
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`endif
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pc = { {4{except_prefix}}, `OR1200_EXCEPT_MMMM, except_type, `OR1200_EXCEPT_VV};
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pc = {(except_prefix ? `OR1200_EXCEPT_EPH1_P : `OR1200_EXCEPT_EPH0_P), except_type, `OR1200_EXCEPT_V};
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taken = 1'b1;
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taken = 1'b1;
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end
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end
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default: begin
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default: begin
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`ifdef OR1200_VERBOSE
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`ifdef OR1200_VERBOSE
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// synopsys translate_off
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// synopsys translate_off
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| Line 295... |
Line 298... |
// PC register
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// PC register
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//
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//
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always @(posedge clk or posedge rst)
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always @(posedge clk or posedge rst)
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if (rst)
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if (rst)
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// pcreg <= #1 30'd63;
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// pcreg <= #1 30'd63;
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pcreg <= #1 ({{4{except_prefix}}, `OR1200_EXCEPT_MMMM, `OR1200_EXCEPT_RESET, `OR1200_EXCEPT_VV} - 1) >> 2;
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pcreg <= #1 ({(except_prefix ? `OR1200_EXCEPT_EPH1_P : `OR1200_EXCEPT_EPH0_P), `OR1200_EXCEPT_RESET, `OR1200_EXCEPT_V} - 1) >> 2;
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else if (spr_pc_we)
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else if (spr_pc_we)
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pcreg <= #1 spr_dat_i[31:2];
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pcreg <= #1 spr_dat_i[31:2];
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else if (no_more_dslot | except_start | !genpc_freeze & !icpu_rty_i & !genpc_refetch)
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else if (no_more_dslot | except_start | !genpc_freeze & !icpu_rty_i & !genpc_refetch)
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// else if (except_start | !genpc_freeze & !icpu_rty_i & !genpc_refetch)
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// else if (except_start | !genpc_freeze & !icpu_rty_i & !genpc_refetch)
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pcreg <= #1 pc[31:2];
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pcreg <= #1 pc[31:2];
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