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Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.5 2002/02/11 04:33:17 lampret
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// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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//
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// Revision 1.4 2002/02/01 19:56:55 lampret
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// Revision 1.4 2002/02/01 19:56:55 lampret
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// Fixed combinational loops.
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// Fixed combinational loops.
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//
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//
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// Revision 1.3 2002/01/28 01:16:00 lampret
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// Revision 1.3 2002/01/28 01:16:00 lampret
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// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.
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// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.
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| Line 278... |
Line 281... |
// CPU and insn memory subsystem
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// CPU and insn memory subsystem
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//
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//
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wire ic_en;
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wire ic_en;
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wire [31:0] icpu_adr_cpu;
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wire [31:0] icpu_adr_cpu;
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wire icpu_cycstb_cpu;
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wire icpu_cycstb_cpu;
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wire icpu_we_cpu;
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wire [3:0] icpu_sel_cpu;
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wire [3:0] icpu_sel_cpu;
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wire [3:0] icpu_tag_cpu;
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wire [3:0] icpu_tag_cpu;
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wire [31:0] icpu_dat_ic;
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wire [31:0] icpu_dat_ic;
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wire icpu_ack_ic;
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wire icpu_ack_ic;
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wire [31:0] icpu_adr_immu;
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wire [31:0] icpu_adr_immu;
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| Line 453... |
Line 455... |
// IC and CPU/IMMU
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// IC and CPU/IMMU
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.ic_en(ic_en),
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.ic_en(ic_en),
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.icimmu_adr_i(icimmu_adr_immu),
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.icimmu_adr_i(icimmu_adr_immu),
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.icimmu_cycstb_i(icimmu_cycstb_immu),
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.icimmu_cycstb_i(icimmu_cycstb_immu),
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.icimmu_ci_i(icimmu_ci_immu),
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.icimmu_ci_i(icimmu_ci_immu),
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.icpu_we_i(icpu_we_cpu),
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.icpu_sel_i(icpu_sel_cpu),
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.icpu_sel_i(icpu_sel_cpu),
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.icpu_tag_i(icpu_tag_cpu),
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.icpu_tag_i(icpu_tag_cpu),
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.icpu_dat_o(icpu_dat_ic),
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.icpu_dat_o(icpu_dat_ic),
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.icpu_ack_o(icpu_ack_ic),
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.icpu_ack_o(icpu_ack_ic),
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.icimmu_rty_o(icimmu_rty_ic),
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.icimmu_rty_o(icimmu_rty_ic),
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| Line 491... |
Line 492... |
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// Connection IC and IFETCHER inside CPU
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// Connection IC and IFETCHER inside CPU
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.ic_en(ic_en),
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.ic_en(ic_en),
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.icpu_adr_o(icpu_adr_cpu),
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.icpu_adr_o(icpu_adr_cpu),
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.icpu_cycstb_o(icpu_cycstb_cpu),
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.icpu_cycstb_o(icpu_cycstb_cpu),
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.icpu_we_o(icpu_we_cpu),
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.icpu_sel_o(icpu_sel_cpu),
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.icpu_sel_o(icpu_sel_cpu),
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.icpu_tag_o(icpu_tag_cpu),
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.icpu_tag_o(icpu_tag_cpu),
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.icpu_dat_i(icpu_dat_ic),
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.icpu_dat_i(icpu_dat_ic),
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.icpu_ack_i(icpu_ack_ic),
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.icpu_ack_i(icpu_ack_ic),
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.icpu_rty_i(icpu_rty_immu),
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.icpu_rty_i(icpu_rty_immu),
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