// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.
// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.
//
//
// Revision 1.2 2002/01/14 06:18:22 lampret
// Revision 1.2 2002/01/14 06:18:22 lampret
// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
Line 150...
Line 153...
//
//
// Central part of the ALU
// Central part of the ALU
//
//
always@(alu_op or a or b or result_sum or result_and or macrc_op or shifted_rotated or mult_mac_result)begin
always@(alu_op or a or b or result_sum or result_and or macrc_op or shifted_rotated or mult_mac_result)begin