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// CVS Revision History

// CVS Revision History

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//

// $Log: not supported by cvs2svn $

// $Log: not supported by cvs2svn $

// Revision 1.3  2002/01/28 01:15:59  lampret

// Revision 1.3  2002/01/28 01:15:59  lampret

// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.

// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.

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// Revision 1.2  2002/01/14 06:18:22  lampret

// Revision 1.2  2002/01/14 06:18:22  lampret

// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.

// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.

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// Central part of the ALU

// Central part of the ALU

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//

always @(alu_op or a or b or result_sum or result_and or macrc_op or shifted_rotated or mult_mac_result) begin

always @(alu_op or a or b or result_sum or result_and or macrc_op or shifted_rotated or mult_mac_result) begin

                `OR1200_ALUOP_SHROT : begin

                `OR1200_ALUOP_SHROT : begin

                                result = shifted_rotated;

                                result = shifted_rotated;

                end

                end

                `OR1200_ALUOP_ADD : begin

                `OR1200_ALUOP_ADD : begin

                                result = result_sum;

                                result = result_sum;