| Line 43... |
Line 43... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1.1.1 2001/10/06 10:18:35 igorm
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// no message
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//
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// Revision 1.4 2001/08/17 08:01:19 lampret
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// Revision 1.4 2001/08/17 08:01:19 lampret
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// IC enable/disable.
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// IC enable/disable.
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//
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//
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// Revision 1.3 2001/08/13 03:36:20 lampret
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// Revision 1.3 2001/08/13 03:36:20 lampret
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// Added cfg regs. Moved all defines into one defines.v file. More cleanup.
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// Added cfg regs. Moved all defines into one defines.v file. More cleanup.
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| Line 71... |
Line 74... |
// Insn interface
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// Insn interface
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ic_insn, ic_addr, ic_stall, ic_fetchop, ic_en,
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ic_insn, ic_addr, ic_stall, ic_fetchop, ic_en,
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immu_en, immuexcept_miss, immuexcept_fault,
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immu_en, immuexcept_miss, immuexcept_fault,
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// Debug unit
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// Debug unit
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ex_freeze, branch_op,
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du_stall, du_addr, du_dat_du, du_read, du_write, du_except,
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du_stall, du_addr, du_dat_du, du_read, du_write, du_except,
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// Data interface
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// Data interface
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dclsu_stall, dclsu_unstall, dclsu_addr, dclsu_datain, dclsu_dataout, dclsu_lsuop, dc_en,
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dclsu_stall, dclsu_unstall, dclsu_addr, dclsu_datain, dclsu_dataout, dclsu_lsuop, dc_en,
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dmmu_en, dmmuexcept_miss, dmmuexcept_fault,
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dmmu_en, dmmuexcept_miss, dmmuexcept_fault,
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| Line 117... |
Line 121... |
output immu_en;
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output immu_en;
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//
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//
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// Debug interface
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// Debug interface
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//
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//
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output ex_freeze;
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output [`BRANCHOP_WIDTH-1:0] branch_op;
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input du_stall;
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input du_stall;
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input [dw-1:0] du_addr;
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input [dw-1:0] du_addr;
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input [dw-1:0] du_dat_du;
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input [dw-1:0] du_dat_du;
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input du_read;
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input du_read;
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input du_write;
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input du_write;
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| Line 208... |
Line 214... |
wire lsu_stall;
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wire lsu_stall;
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wire branch_stall;
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wire branch_stall;
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wire epcr_we;
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wire epcr_we;
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wire eear_we;
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wire eear_we;
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wire esr_we;
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wire esr_we;
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wire pc_we;
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wire [31:0] epcr;
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wire [31:0] epcr;
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wire [31:0] eear;
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wire [31:0] eear;
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wire [`SR_WIDTH-1:0] esr;
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wire [`SR_WIDTH-1:0] esr;
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wire [`SR_WIDTH-1:0] sr;
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wire [`SR_WIDTH-1:0] sr;
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wire except_start;
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wire except_start;
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| Line 221... |
Line 228... |
wire [15:0] spr_addrimm;
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wire [15:0] spr_addrimm;
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wire sig_syscall;
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wire sig_syscall;
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wire sig_trap;
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wire sig_trap;
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wire [31:0] spr_dat_cfgr;
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wire [31:0] spr_dat_cfgr;
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wire [31:0] spr_dat_rf;
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wire [31:0] spr_dat_rf;
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wire [31:0] spr_dat_pc;
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wire force_dslot_fetch;
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wire force_dslot_fetch;
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wire if_stall;
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wire if_stall;
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wire id_macrc_op;
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wire id_macrc_op;
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wire ex_macrc_op;
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wire ex_macrc_op;
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wire [31:0] mult_mac_result;
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wire [31:0] mult_mac_result;
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| Line 290... |
Line 298... |
.except_flushpipe(except_flushpipe),
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.except_flushpipe(except_flushpipe),
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.except_type(except_type),
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.except_type(except_type),
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.except_start(except_start),
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.except_start(except_start),
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.except_started(except_started),
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.except_started(except_started),
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.wb_pc(wb_pc),
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.wb_pc(wb_pc),
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.ex_pc(spr_dat_pc),
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.datain(operand_b),
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.datain(operand_b),
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.epcr_we(epcr_we),
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.epcr_we(epcr_we),
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.eear_we(eear_we),
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.eear_we(eear_we),
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.esr_we(esr_we),
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.esr_we(esr_we),
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| Line 327... |
Line 336... |
.taken(branch_taken),
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.taken(branch_taken),
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.binsn_addr(lr_sav),
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.binsn_addr(lr_sav),
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.epcr(epcr),
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.epcr(epcr),
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.force_dslot_fetch(force_dslot_fetch),
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.force_dslot_fetch(force_dslot_fetch),
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.if_stall(if_stall),
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.if_stall(if_stall),
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.branch_stall(branch_stall)
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.branch_stall(branch_stall),
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.spr_dat_i(spr_dataout),
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.spr_pc_we(pc_we)
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);
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);
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//
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//
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// Instantiation of instruction decode/control logic
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// Instantiation of instruction decode/control logic
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//
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//
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| Line 480... |
Line 491... |
.spr_dat_pic(spr_dat_pic),
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.spr_dat_pic(spr_dat_pic),
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.spr_dat_tt(spr_dat_tt),
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.spr_dat_tt(spr_dat_tt),
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.spr_dat_pm(spr_dat_pm),
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.spr_dat_pm(spr_dat_pm),
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.spr_dat_cfgr(spr_dat_cfgr),
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.spr_dat_cfgr(spr_dat_cfgr),
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.spr_dat_rf(spr_dat_rf),
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.spr_dat_rf(spr_dat_rf),
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.spr_dat_pc(spr_dat_pc),
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.spr_dat_dmmu(spr_dat_dmmu),
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.spr_dat_dmmu(spr_dat_dmmu),
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.spr_dat_immu(spr_dat_immu),
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.spr_dat_immu(spr_dat_immu),
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.spr_dat_du(spr_dat_du),
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.spr_dat_du(spr_dat_du),
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.spr_dataout(spr_dataout),
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.spr_dataout(spr_dataout),
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.spr_cs(spr_cs),
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.spr_cs(spr_cs),
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.spr_we(spr_we),
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.spr_we(spr_we),
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.epcr_we(epcr_we),
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.epcr_we(epcr_we),
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.eear_we(eear_we),
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.eear_we(eear_we),
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.esr_we(esr_we),
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.esr_we(esr_we),
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.pc_we(pc_we),
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.epcr(epcr),
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.epcr(epcr),
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.eear(eear),
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.eear(eear),
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.esr(esr),
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.esr(esr),
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.except_start(except_start),
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.except_start(except_start),
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.except_started(except_started),
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.except_started(except_started),
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