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Rev 215	Rev 217
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.8 2001/10/14 13:12:09 lampret`
	`// MP3 version.`
	`//`
`// Revision 1.1.1.1 2001/10/06 10:18:36 igorm`	`// Revision 1.1.1.1 2001/10/06 10:18:36 igorm`
`// no message`	`// no message`
`//`	`//`
`// Revision 1.3 2001/08/17 08:01:19 lampret`	`// Revision 1.3 2001/08/17 08:01:19 lampret`
`// IC enable/disable.`	`// IC enable/disable.`
Line 62...	Line 65...
`// Revision 1.1 2001/07/20 00:46:03 lampret`	`// Revision 1.1 2001/07/20 00:46:03 lampret`
`// Development version of RTL. Libraries are missing.`	`// Development version of RTL. Libraries are missing.`
`//`	`//`
`//`	`//`

`define XILINX_RAMB4	//`define XILINX_RAMB4
//`define XILINX_RAM32X1D	//`define XILINX_RAM32X1D
//`define ARTISAN_SSP	`define ARTISAN_SSP
//`define ARTISAN_SDP	//`define ARTISAN_SDP
//`define ARTISAN_STP	//`define ARTISAN_STP

`// Dump VCD`	`// Dump VCD`
`define VCD_DUMP	`define VCD_DUMP
Line 77...	Line 80...
//`define OR1200_VERBOSE	//`define OR1200_VERBOSE

`//`	`//`
`// Data cache not implemented`	`// Data cache not implemented`
`//`	`//`
`define OR1200_NO_DC	//`define OR1200_NO_DC

`//`	`//`
`// Insn cache not implemented`	`// Insn cache not implemented`
`//`	`//`
`define OR1200_NO_IC	//`define OR1200_NO_IC

`//`	`//`
`// Data MMU not implemented`	`// Data MMU not implemented`
`//`	`//`
`define OR1200_NO_DMMU	//`define OR1200_NO_DMMU

`//`	`//`
`// Insn MMU not implemented`	`// Insn MMU not implemented`
`//`	`//`
`define OR1200_NO_IMMU	//`define OR1200_NO_IMMU

`//`	`//`
`// Register OR1200 outputs`	`// Register OR1200 outputs`
`//`	`//`
//`define OR1200_REGISTERED_OUTPUTS	//`define OR1200_REGISTERED_OUTPUTS

`//`	`//`
`// Implement rotate in the ALU`	`// Implement rotate in the ALU`
`//`	`//`
`define IMPL_ALU_ROTATE	//`define IMPL_ALU_ROTATE

`//`	`//`
`// Which type of compare to implement`	`// Which type of compare to implement`
`//`	`//`
//`define IMPL_ALU_COMP1	//`define IMPL_ALU_COMP1
Line 346...	Line 349...
`//`	`//`
`// Debug Unit`	`// Debug Unit`
`//`	`//`

`// Define it if you want DU implemented`	`// Define it if you want DU implemented`
//`define DU_IMPLEMENTED	`define DU_IMPLEMENTED

`// Address offsets of DU registers inside DU group`	`// Address offsets of DU registers inside DU group`
`define DU_OFS_DMR1 5'd16	`define DU_OFS_DMR1 5'd16
`define DU_OFS_DMR2 5'd17	`define DU_OFS_DMR2 5'd17
`define DU_OFS_DSR 5'd20	`define DU_OFS_DSR 5'd20

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[/] [or1k/] [branches/] [mp3_stable/] [or1200/] [rtl/] [verilog/] [defines.v] - Diff between revs 215 and 217