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[/] [or1k/] [branches/] [mp3_stable/] [or1200/] [rtl/] [verilog/] [generic_spram_64x14.v] - Diff between revs 205 and 209

Rev 205	Rev 209
Line 99...	Line 99...
`output [dw-1:0] do; // output data bus`	`output [dw-1:0] do; // output data bus`

`//`	`//`
`// Internal wires and registers`	`// Internal wires and registers`
`//`	`//`
	`wire [1:0] unconnected;`

`ifdef ARTISAN_SSP	`ifdef ARTISAN_SSP

`//`	`//`
`// Instantiation of ASIC memory:`	`// Instantiation of ASIC memory:`
Line 194...	Line 194...
`//`	`//`
`RAMB4_S16 ramb4_s16_0(`	`RAMB4_S16 ramb4_s16_0(`
`.CLK(clk),`	`.CLK(clk),`
`.RST(rst),`	`.RST(rst),`
`.ADDR({2'b00, addr}),`	`.ADDR({2'b00, addr}),`
`.DI(di[13:0]),`	`.DI({unconnected, di[13:0]}),`
`.EN(ce),`	`.EN(ce),`
`.WE(we),`	`.WE(we),`
`.DO(do[13:0])`	`.DO({unconnected, do[13:0]})`
`);`	`);`

`else	`else

`//`	`//`