URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [branches/] [mp3_stable/] [or1200/] [rtl/] [verilog/] [immu.v] - Diff between revs 209 and 210

Rev 209	Rev 210
Line 150...	Line 150...
`//`	`//`
`// Put all outputs in inactive state`	`// Put all outputs in inactive state`
`//`	`//`
`assign immufetch_stall = 1'b0;`	`assign immufetch_stall = 1'b0;`
`assign immuexcept_miss = 1'b0;`	`assign immuexcept_miss = 1'b0;`
`assign immuexcept_miss = 1'b1;`	`assign immuexcept_fault = 1'b0;`
`output spr_dat_o = 32'h00000000;`	`assign spr_dat_o = 32'h00000000;`
`output icimmu_paddr = immfetch_vaddr;`	`assign icimmu_paddr = immufetch_vaddr;`

`else	`else

`//`	`//`
`// ITLB SPR access`	`// ITLB SPR access`