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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2001/08/09 13:39:33 lampret
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// Major clean-up.
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//
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// Revision 1.1 2001/07/20 00:46:23 lampret
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// Revision 1.1 2001/07/20 00:46:23 lampret
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// Development version of RTL. Libraries are missing.
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// Development version of RTL. Libraries are missing.
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//
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//
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//
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//
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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`include "defines.v"
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`include "defines.v"
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module wbmux(
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module wbmux(
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// Clock and reset
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// Clock and reset
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clk, rst,
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clk, rst,
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Line 116... |
//
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//
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// Write-back multiplexer
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// Write-back multiplexer
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//
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//
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always @(muxin_a or muxin_b or muxin_c or muxin_d or rfwb_op) begin
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always @(muxin_a or muxin_b or muxin_c or muxin_d or rfwb_op) begin
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case(rfwb_op[`RFWBOP_WIDTH-1:1]) // synopsys full_case parallel_case infer_mux
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case(rfwb_op[`RFWBOP_WIDTH-1:1]) // synopsys full_case parallel_case infer_mux
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'b00: muxout <= #1 muxin_a;
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'b00: muxout = muxin_a;
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'b01: begin
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'b01: begin
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muxout <= #1 muxin_b;
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muxout = muxin_b;
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`ifdef OR1200_VERBOSE
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// synopsys translate_off
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$display(" WBMUX: muxin_b %h", muxin_b);
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$display(" WBMUX: muxin_b %h", muxin_b);
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// translate_on
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`endif
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end
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end
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'b10: begin
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'b10: begin
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muxout <= #1 muxin_c;
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muxout = muxin_c;
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`ifdef OR1200_VERBOSE
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// synopsys translate_off
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$display(" WBMUX: muxin_c %h", muxin_c);
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$display(" WBMUX: muxin_c %h", muxin_c);
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// translate_on
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`endif
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end
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end
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'b11: begin
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'b11: begin
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muxout <= #1 muxin_d + 4'h8;
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muxout = muxin_d + 4'h8;
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`ifdef OR1200_VERBOSE
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// synopsys translate_off
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$display(" WBMUX: muxin_d %h", muxin_d + 4'h8);
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$display(" WBMUX: muxin_d %h", muxin_d + 4'h8);
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// translate_on
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`endif
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end
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end
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endcase
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endcase
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end
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end
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endmodule
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endmodule
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