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Line 22... |
#include <string.h>
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#include <string.h>
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#include "abstract.h"
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#include "abstract.h"
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#include "except.h"
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#include "except.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "sim-config.h"
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static void except_handle_backend(int,unsigned long,unsigned long);
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static void except_handle_backend(int,unsigned long,unsigned long);
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extern int cont_run;
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extern int cont_run;
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extern struct iqueue_entry iqueue[20];
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extern struct iqueue_entry iqueue[20];
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Line 136... |
cycle_delay = 0; /* An exception stalls the CPU 0 clock cycles */
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cycle_delay = 0; /* An exception stalls the CPU 0 clock cycles */
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}
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}
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static void except_handle_backend(int except, unsigned long ea, unsigned long pc_saved)
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static void except_handle_backend(int except, unsigned long ea, unsigned long pc_saved)
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{
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{
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/* Ignore masked exceptions */
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if (! IS_NME(except) && (!(mfspr(SPR_SR) & SPR_SR_EXR))) {
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if (config.sim.verbose)
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printf("INFO: Exception occured while exception detection was disabled.\n");
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return;
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}
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pending.valid = 0;
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pending.valid = 0;
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pending.type = 0;
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pending.type = 0;
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pending.address = 0;
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pending.address = 0;
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pending.saved = 0;
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pending.saved = 0;
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#if ONLY_VIRTUAL_MACHINE
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#if ONLY_VIRTUAL_MACHINE
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printf("WARNING: No exception processing while ONLY_VIRTUAL_MACHINE is defined.\n");
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fprintf(stderr, "WARNING: No exception processing while ONLY_VIRTUAL_MACHINE is defined.\n");
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cont_run = 0;
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cont_run = 0;
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#else
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#else
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if (delay_insn) {
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if (delay_insn) {
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printf(" INFO: Exception during execution of delay slot insn.\n");
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printf(" INFO: Exception during execution of delay slot insn.\n");
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Line 165... |
decode(&iqueue[0]); /* (itlbmiss is special case) */
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decode(&iqueue[0]); /* (itlbmiss is special case) */
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execute();
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execute();
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}
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}
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#endif
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#endif
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if (! IS_NME(except) && (!(mfspr(SPR_SR) & SPR_SR_EXR))) {
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printf("ABORT: Exception occured while exception detection was disabled.\n");
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cont_run = 0;
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return;
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}
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pc_saved = pc & ~0x3;
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pc_saved = pc & ~0x3;
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mtspr(SPR_EPCR_BASE, pc_saved);
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mtspr(SPR_EPCR_BASE, pc_saved);
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mtspr(SPR_EEAR_BASE, ea);
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mtspr(SPR_EEAR_BASE, ea);
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mtspr(SPR_ESR_BASE, mfspr(SPR_SR));
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mtspr(SPR_ESR_BASE, mfspr(SPR_SR));
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