URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Diff between revs 518 and 561

Rev 518	Rev 561
Line 62...	Line 62...
`fclose(fo);`	`fclose(fo);`
`printf("Audio closed.\n");`	`printf("Audio closed.\n");`
`cont_run = 0;`	`cont_run = 0;`
`return;`	`return;`
`case SPR_TTMR:`	`case SPR_TTMR:`
`/* CZ -- 04/09/01 Clear the interrupt in the PIC also... */`
`/* If it's cleared now and it was set, then we need to fix it */`
`if(~value & SPR_TTMR_IP & sprs[SPR_TTMR])`	`if(~value & SPR_TTMR_IP & sprs[SPR_TTMR])`
`setsprbit(SPR_PICSR, 3, 0);`	`setsprbit(SPR_PICSR, config.tick.irq, 0);`
`if (value & SPR_TTMR_M == 2) break;`	`break;`
`case SPR_TTCR:`	`case SPR_TTCR:`
`tt_stopped = 0;`	`tt_stopped = 0;`
`break;`	`break;`
`case SPR_SR:`	`case SPR_SR:`
`if(value & SPR_SR_F)`	`if(value & SPR_SR_F)`
`flag = 1;`	`flag = 1;`
`else`	`else`
`flag = 0;`	`flag = 0;`
`sprs[SPR_SR] = value \| SPR_SR_EXR; /* Exceptions are allways enabled */`	`sprs[SPR_SR] = value \| SPR_SR_EXR; /* Exceptions are allways enabled */`
`break;`	`break;`
`case SPR_EPCR_BASE:`
`if((value & 0xffffff00) == 0x00020600)`
`{`
`printf("SIMON: EPCR = ext_int\n");`
`cont_run = 0;`
`}`
`break;`
`case SPR_NPC:`	`case SPR_NPC:`
`{`	`{`
`extern unsigned long pc;`	`extern unsigned long pc;`
`extern unsigned long pcnext;`	`extern unsigned long pcnext;`
`extern int delay_insn;`	`extern int delay_insn;`