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Rev 1058 |
Line 62... |
Line 62... |
#define MC_CSC_MEMTYPE_ASYNC 2
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#define MC_CSC_MEMTYPE_ASYNC 2
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#define MC_CSC_MEMTYPE_SYNC 3
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#define MC_CSC_MEMTYPE_SYNC 3
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#define MC_CSR_VALID 0xFF000703LU
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#define MC_CSR_VALID 0xFF000703LU
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#define MC_POC_VALID 0x0000000FLU
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#define MC_POC_VALID 0x0000000FLU
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#define MC_BA_MASK_VALID 0x000000FFLU
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#define MC_BA_MASK_VALID 0x000003FFLU
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#define MC_CSC_VALID 0x00FF0FFFLU
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#define MC_CSC_VALID 0x00FF0FFFLU
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#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU
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#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU
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#define MC_TMS_SSRAM_VALID 0x00000000LU
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#define MC_TMS_SSRAM_VALID 0x00000000LU
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#define MC_TMS_ASYNC_VALID 0x03FFFFFFLU
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#define MC_TMS_ASYNC_VALID 0x03FFFFFFLU
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#define MC_TMS_SYNC_VALID 0x01FFFFFFLU
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#define MC_TMS_SYNC_VALID 0x01FFFFFFLU
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