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Rev 897 |
Rev 912 |
Line 130... |
Line 130... |
config.cpu.dependstats = 0;
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config.cpu.dependstats = 0;
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config.cpu.sbuf_len = 0;
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config.cpu.sbuf_len = 0;
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config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
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config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
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| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
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| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
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| SPR_UPR_PMP | SPR_UPR_TTP;
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| SPR_UPR_PMP | SPR_UPR_TTP;
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config.cpu.sr = 0x00008003;
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config.cpu.sr = 0x00008001;
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/* Debug */
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/* Debug */
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config.debug.enabled = 0;
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config.debug.enabled = 0;
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config.debug.gdb_enabled = 0;
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config.debug.gdb_enabled = 0;
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config.debug.server_port = 0;
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config.debug.server_port = 0;
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