URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [support/] [simprintf.c] - Diff between revs 123 and 173

Rev 123	Rev 173
Line 40...	Line 40...
`unsigned long fmtaddr;`	`unsigned long fmtaddr;`
`FILE *f;`	`FILE *f;`
`int i;`	`int i;`
`int breakpoint = 0;`	`int breakpoint = 0;`

`#if STACK_ARGS`
`fmtaddr = eval_mem32(stackaddr,&breakpoint);`
`#else`
`fmtaddr = regparam;`	`fmtaddr = regparam;`
`#endif`

`i = 0;`	`i = 0;`
`while (eval_mem8(fmtaddr,&breakpoint) != '\0') {`	`while (eval_mem8(fmtaddr,&breakpoint) != '\0') {`
`fmtstr[i++] = eval_mem8(fmtaddr,&breakpoint);`	`fmtstr[i++] = eval_mem8(fmtaddr,&breakpoint);`
`fmtaddr++;`	`fmtaddr++;`
Line 89...	Line 85...
`*fmtstrend = '\0';`	`*fmtstrend = '\0';`
`debug(" 2");`	`debug(" 2");`
`if (strstr(fmtstrpart, "%")) {`	`if (strstr(fmtstrpart, "%")) {`
`debug(" 3");`	`debug(" 3");`
`#if STACK_ARGS`	`#if STACK_ARGS`
`argaddr += 4;`
`arg = eval_mem32(argaddr,&breakpoint);`	`arg = eval_mem32(argaddr,&breakpoint);`
	`argaddr += 4;`
`#else`	`#else`
`sprintf(regstr, "r%u", ++argaddr);`	`sprintf(regstr, "r%u", ++argaddr);`
`arg = eval_reg(regstr);`	`arg = eval_reg(regstr);`
`#endif`	`#endif`
`debug(" 4: fmtstrpart=%p fmtstrpart=%s arg=%p", fmtstrpart, fmtstrpart, arg);`	`debug(" 4: fmtstrpart=%p fmtstrpart=%s arg=%p", fmtstrpart, fmtstrpart, arg);`