URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 469 |
Rev 552 |
Line 19... |
Line 19... |
*/
|
*/
|
|
|
#ifndef __MC_SSRAM_H
|
#ifndef __MC_SSRAM_H
|
#define __MC_SSRAM_H
|
#define __MC_SSRAM_H
|
|
|
|
/* should configuration be read form MC? */
|
|
#define MC_READ_CONF
|
|
|
/* TEMPLATE SELECTION */
|
/* TEMPLATE SELECTION */
|
/* change #undef to #define */
|
/* change #undef to #define */
|
#define _MC_TEST_TEMPLATE1
|
#define _MC_TEST_TEMPLATE1
|
#undef _MC_TEST_TEMPLATE2
|
#undef _MC_TEST_TEMPLATE2
|
#undef _MC_TEST_TEMPLATE3
|
#undef _MC_TEST_TEMPLATE3
|
Line 31... |
Line 34... |
/* memory configuration that must reflect mcmem.cfg */
|
/* memory configuration that must reflect mcmem.cfg */
|
#define MC_SSRAM_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 SSRAM at CS, 0 something else at CS */
|
#define MC_SSRAM_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 SSRAM at CS, 0 something else at CS */
|
|
|
typedef struct MC_SSRAM_CS
|
typedef struct MC_SSRAM_CS
|
{
|
{
|
unsigned char M;
|
unsigned long M;
|
} MC_SSRAM_CS;
|
} MC_SSRAM_CS;
|
|
|
MC_SSRAM_CS mc_ssram_cs[8] = {
|
MC_SSRAM_CS mc_ssram_cs[8] = {
|
{ 0x02 /* SELect mask */
|
{ 0x02 /* SELect mask */
|
},
|
},
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.