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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cpu/] [dlx/] [execute.c] - Diff between revs 6 and 30

Rev 6	Rev 30
Line 260...	Line 260...

`/* Simulate instruction cache */`	`/* Simulate instruction cache */`
`ic_simulate(pc);`	`ic_simulate(pc);`

`/* Fetch instruction. */`	`/* Fetch instruction. */`
`strcpy(iqueue[0].insn, mem[pc].insn);`	`strcpy(iqueue[0].insn, mem[pc].insn->insn);`
`strcpy(iqueue[0].op1, mem[pc].op1);`	`strcpy(iqueue[0].op1, mem[pc].insn->op1);`
`strcpy(iqueue[0].op2, mem[pc].op2);`	`strcpy(iqueue[0].op2, mem[pc].insn->op2);`
`strcpy(iqueue[0].op3, mem[pc].op3);`	`strcpy(iqueue[0].op3, mem[pc].insn->op3);`
`iqueue[0].insn_addr = pc;`	`iqueue[0].insn_addr = pc;`
`iqueue[0].dependdst = NULL;`	`iqueue[0].dependdst = NULL;`
`iqueue[0].dependsrc1 = NULL;`	`iqueue[0].dependsrc1 = NULL;`
`iqueue[0].dependsrc2 = NULL;`	`iqueue[0].dependsrc2 = NULL;`