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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cpu/] [or32/] [execute.c] - Diff between revs 1550 and 1551

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Rev 1550 Rev 1551
Line 57... Line 57...
 
 
/* Benchmark multi issue execution */
/* Benchmark multi issue execution */
int multissue[20];
int multissue[20];
int issued_per_cycle = 4;
int issued_per_cycle = 4;
 
 
/* Previous program counter */
 
oraddr_t pcprev = 0;
 
 
 
/* Temporary program counter */
/* Temporary program counter */
oraddr_t pcnext;
oraddr_t pcnext;
 
 
/* Store buffer analysis - stores are accumulated and commited when IO is idle */
/* Store buffer analysis - stores are accumulated and commited when IO is idle */
static int sbuf_head = 0, sbuf_tail = 0, sbuf_count = 0;
static int sbuf_head = 0, sbuf_tail = 0, sbuf_count = 0;
Line 296... Line 293...
 
 
/* This code actually updates the PC value.  */
/* This code actually updates the PC value.  */
static inline void update_pc (void)
static inline void update_pc (void)
{
{
  cpu_state.delay_insn = next_delay_insn;
  cpu_state.delay_insn = next_delay_insn;
  pcprev = cpu_state.pc; /* Store value for later */
  cpu_state.sprs[SPR_PPC] = cpu_state.pc; /* Store value for later */
  cpu_state.pc = pcnext;
  cpu_state.pc = pcnext;
  pcnext = cpu_state.delay_insn ? cpu_state.pc_delay : pcnext + 4;
  pcnext = cpu_state.delay_insn ? cpu_state.pc_delay : pcnext + 4;
}
}
 
 
#if SIMPLE_EXECUTION
#if SIMPLE_EXECUTION

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