OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cuc/] [timings.c] - Diff between revs 907 and 930

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 907 Rev 930
Line 30... Line 30...
static double max_bb_delay;
static double max_bb_delay;
 
 
/* Returns instruction delay */
/* Returns instruction delay */
double insn_time (cuc_insn *ii)
double insn_time (cuc_insn *ii)
{
{
  if (ii->opt[2] & OPT_CONST)
  if (ii->opt[2] & OPT_CONST) {
    return timing_table[ii->index].delayi;
    if (ii->opt[1] & OPT_CONST) return 0.;
  else return timing_table[ii->index].delay;
    else return timing_table[ii->index].delayi;
 
  } else return timing_table[ii->index].delay;
}
}
 
 
/* Returns instruction size */
/* Returns instruction size */
double insn_size (cuc_insn *ii)
double insn_size (cuc_insn *ii)
{
{
  if (ii->opt[2] & OPT_CONST)
  double s = (ii->opt[2] & OPT_CONST) ? timing_table[ii->index].sizei
    return timing_table[ii->index].sizei;
          : timing_table[ii->index].size;
  else return timing_table[ii->index].size;
  if (ii->opt[1] & OPT_CONST) return 0.;
 
  if (ii->type & IT_COND && (ii->index == II_CMOV || ii->index == II_ADD)) return s / 32.;
 
  else return s;
}
}
 
 
/* Returns normal instruction size */
/* Returns normal instruction size */
double ii_size (int index, int imm)
double ii_size (int index, int imm)
{
{

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.