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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [ethernet.h] - Diff between revs 444 and 695

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Rev 444 Rev 695
Line 68... Line 68...
#define ETH_MODER_RST_OFFSET       11
#define ETH_MODER_RST_OFFSET       11
#define ETH_MODER_FULLD_OFFSET     10
#define ETH_MODER_FULLD_OFFSET     10
#define ETH_MODER_EXDFREN_OFFSET   9
#define ETH_MODER_EXDFREN_OFFSET   9
#define ETH_MODER_NOBCKOF_OFFSET   8
#define ETH_MODER_NOBCKOF_OFFSET   8
#define ETH_MODER_LOOPBCK_OFFSET   7
#define ETH_MODER_LOOPBCK_OFFSET   7
 
#define ETH_MODER_IFG_OFFSET       6
#define ETH_MODER_PRO_OFFSET       5
#define ETH_MODER_PRO_OFFSET       5
#define ETH_MODER_IAM_OFFSET       4
#define ETH_MODER_IAM_OFFSET       4
#define ETH_MODER_BRO_OFFSET       3
#define ETH_MODER_BRO_OFFSET       3
#define ETH_MODER_NOPRE_OFFSET     2
#define ETH_MODER_NOPRE_OFFSET     2
#define ETH_MODER_TXEN_OFFSET      1
#define ETH_MODER_TXEN_OFFSET      1
Line 95... Line 96...
#define ETH_PACKETLEN_MINFL_OFFSET 16
#define ETH_PACKETLEN_MINFL_OFFSET 16
#define ETH_PACKETLEN_MINFL_WIDTH  16
#define ETH_PACKETLEN_MINFL_WIDTH  16
#define ETH_PACKETLEN_MAXFL_OFFSET 0
#define ETH_PACKETLEN_MAXFL_OFFSET 0
#define ETH_PACKETLEN_MAXFL_WIDTH  16
#define ETH_PACKETLEN_MAXFL_WIDTH  16
 
 
 
/* Field definitions for COLLCONF */
 
#define ETH_COLLCONF_MAXRET_OFFSET 16
 
#define ETH_COLLCONF_MAXRET_WIDTH  4
 
#define ETH_COLLCONF_COLLVALID_OFFSET 0
 
#define ETH_COLLCONF_COLLVALID_WIDTH  6
 
 
 
/* Field definitions for CTRLMODER */
 
#define ETH_CMODER_TXFLOW_OFFSET   2
 
#define ETH_CMODER_RXFLOW_OFFSET   1
 
#define ETH_CMODER_PASSALL_OFFSET  0
 
 
 
/* Field definitions for MIIMODER */
 
#define ETH_MIIMODER_MRST_OFFSET   10
 
#define ETH_MIIMODER_NOPRE_OFFSET  8
 
#define ETH_MIIMODER_CLKDIV_OFFSET 0
 
#define ETH_MIIMODER_CLKDIV_WIDTH  8
 
 
 
/* Field definitions for MIICOMMAND */
 
#define ETH_MIICOMM_WCDATA_OFFSET  2
 
#define ETH_MIICOMM_RSTAT_OFFSET   1
 
#define ETH_MIICOMM_SCANS_OFFSET   0
 
 
 
/* Field definitions for MIIADDRESS */
 
#define ETH_MIIADDR_RGAD_OFFSET    8
 
#define ETH_MIIADDR_RGAD_WIDTH     5
 
#define ETH_MIIADDR_FIAD_OFFSET    0
 
#define ETH_MIIADDR_FIAD_WIDTH     5
 
 
 
/* Field definitions for MIISTATUS */
 
#define ETH_MIISTAT_NVALID_OFFSET  9
 
#define ETH_MIISTAT_BUSY_OFFSET    8
 
#define ETH_MIISTAT_FAIL_OFFSET    0
 
 
/* Field definitions for TX buffer descriptors */
/* Field definitions for TX buffer descriptors */
#define ETH_TX_BD_LENGTH_OFFSET        16
#define ETH_TX_BD_LENGTH_OFFSET        16
#define ETH_TX_BD_LENGTH_WIDTH         16
#define ETH_TX_BD_LENGTH_WIDTH         16
#define ETH_TX_BD_READY_OFFSET         15
#define ETH_TX_BD_READY_OFFSET         15
#define ETH_TX_BD_INTERRUPT_OFFSET     14
#define ETH_TX_BD_INTERRUPT_OFFSET     14
#define ETH_TX_BD_WRAP_OFFSET          13
#define ETH_TX_BD_WRAP_OFFSET          13
#define ETH_TX_BD_PAD_OFFSET           12
#define ETH_TX_BD_PAD_OFFSET           12
#define ETH_TX_BD_CRC_OFFSET           11
#define ETH_TX_BD_CRC_OFFSET           11
#define ETH_TX_BD_LAST_OFFSET          10
#define ETH_TX_BD_LAST_OFFSET          10
#define ETH_TX_BD_PAUSE_OFFSET         9
#define ETH_TX_BD_PAUSE_OFFSET         9
#define ETH_TX_BD_DEFER_OFFSET         8
#define ETH_TX_BD_UNDERRUN_OFFSET      8
#define ETH_TX_BD_COLLISION_OFFSET     7
#define ETH_TX_BD_RETRY_OFFSET         4
#define ETH_TX_BD_RETRANSMIT_OFFSET    6
 
#define ETH_TX_BD_UNDERRUN_OFFSET      5
 
#define ETH_TX_BD_NO_CARRIER_OFFSET    4
 
#define ETH_TX_BD_RETRY_OFFSET         0
 
#define ETH_TX_BD_RETRY_WIDTH          4
#define ETH_TX_BD_RETRY_WIDTH          4
 
#define ETH_TX_BD_RETRANSMIT_OFFSET    3
 
#define ETH_TX_BD_COLLISION_OFFSET     2
 
#define ETH_TX_BD_DEFER_OFFSET         1
 
#define ETH_TX_BD_NO_CARRIER_OFFSET    0
 
 
 
 
/* Field definitions for RX buffer descriptors */
/* Field definitions for RX buffer descriptors */
#define ETH_RX_BD_LENGTH_OFFSET        16
#define ETH_RX_BD_LENGTH_OFFSET        16
#define ETH_RX_BD_LENGTH_WIDTH         16
#define ETH_RX_BD_LENGTH_WIDTH         16
#define ETH_RX_BD_EMPTY_OFFSET         15
#define ETH_RX_BD_EMPTY_OFFSET         15
#define ETH_RX_BD_INTERRUPT_OFFSET     14
#define ETH_RX_BD_INTERRUPT_OFFSET     14
#define ETH_RX_BD_WRAP_OFFSET          13
#define ETH_RX_BD_WRAP_OFFSET          13
#define ETH_RX_BD_LAST_OFFSET          10
#define ETH_RX_BD_MISS_OFFSET          7
#define ETH_RX_BD_PAUSE_OFFSET         9
#define ETH_RX_BD_UVERRUN_OFFSET       6
#define ETH_RX_BD_DEFER_OFFSET         8
#define ETH_RX_BD_INVALID_OFFSET       5
#define ETH_RX_BD_COLLISION_OFFSET     7
#define ETH_RX_BD_DRIBBLE_OFFSET       4
#define ETH_RX_BD_RETRANSMIT_OFFSET    6
#define ETH_RX_BD_TOOBIG_OFFSET        3
#define ETH_RX_BD_UNDERRUN_OFFSET      5
#define ETH_RX_BD_TOOSHORT_OFFSET      2
#define ETH_RX_BD_NO_CARRIER_OFFSET    4
#define ETH_RX_BD_CRC_OFFSET           1
#define ETH_RX_BD_RETRY_OFFSET         0
#define ETH_RX_BD_LATECOLL_OFFSET      0
#define ETH_RX_BD_RETRY_WIDTH          4
 
 
 
 
 
 
 
 
 
#endif /* __OR1KSIM_PERIPHERAL_ETHERNET_H */
#endif /* __OR1KSIM_PERIPHERAL_ETHERNET_H */
 
 
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