| Line 39... |
Line 39... |
void set_csc_tms (int cs, unsigned long csc, unsigned long tms) {
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void set_csc_tms (int cs, unsigned long csc, unsigned long tms) {
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struct dev_memarea *mem_dev = dev_list;
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struct dev_memarea *mem_dev = dev_list;
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|
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while (mem_dev) {
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while (mem_dev) {
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if (mem_dev->chip_select == cs) {
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if (mem_dev->chip_select == cs) {
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mem_dev->addr_mask = 0xe0000000 | mc.ba_mask << 21;
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mem_dev->addr_mask = mc.ba_mask << 22;
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mem_dev->addr_compare = ((csc >> MC_CSC_SEL_OFFSET) /* & 0xff*/) << 21;
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mem_dev->addr_compare = ((csc >> MC_CSC_SEL_OFFSET) /* & 0xff*/) << 22;
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mem_dev->valid = (csc >> MC_CSC_EN_OFFSET) & 0x01;
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mem_dev->valid = (csc >> MC_CSC_EN_OFFSET) & 0x01;
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|
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if ((csc >> MC_CSC_MEMTYPE_OFFSET) && 0x07 == MC_CSC_MEMTYPE_ASYNC) {
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if ((csc >> MC_CSC_MEMTYPE_OFFSET) && 0x07 == MC_CSC_MEMTYPE_ASYNC) {
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mem_dev->delayr = (tms & 0xff) + ((tms >> 8) & 0x0f);
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mem_dev->delayr = (tms & 0xff) + ((tms >> 8) & 0x0f);
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mem_dev->delayw = ((tms >> 12) & 0x0f) + ((tms >> 16) & 0x0f) + ((tms >> 20) & 0x3f);
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mem_dev->delayw = ((tms >> 12) & 0x0f) + ((tms >> 16) & 0x0f) + ((tms >> 20) & 0x3f);
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| Line 164... |
Line 164... |
mem_dev = mem_dev->next;
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mem_dev = mem_dev->next;
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}
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}
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set_csc_tms (0, mc.csc[0], mc.tms[0]);
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set_csc_tms (0, mc.csc[0], mc.tms[0]);
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|
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register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, mc_read_word, mc_write_word);
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register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word);
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}
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}
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}
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}
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inline void mc_clock()
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inline void mc_clock()
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{
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{
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