URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [memory.c] - Diff between revs 1556 and 1557

Rev 1556	Rev 1557
Line 66...	Line 66...
`return (uint16_t )(dat + (addr ^ 2));`	`return (uint16_t )(dat + (addr ^ 2));`
`}`	`}`

`uint8_t simmem_read8(oraddr_t addr, void *dat)`	`uint8_t simmem_read8(oraddr_t addr, void *dat)`
`{`	`{`
`return (uint8_t )(dat + ((addr & ~ADDR_C(3)) \| (3 - addr & 3)));`	`return (uint8_t )(dat + ((addr & ~ADDR_C(3)) \| (3 - (addr & 3))));`
`}`	`}`

`void simmem_write32(oraddr_t addr, uint32_t value, void *dat)`	`void simmem_write32(oraddr_t addr, uint32_t value, void *dat)`
`{`	`{`
`(uint32_t )(dat + addr) = value;`	`(uint32_t )(dat + addr) = value;`
Line 81...	Line 81...
`(uint16_t )(dat + (addr ^ 2)) = value;`	`(uint16_t )(dat + (addr ^ 2)) = value;`
`}`	`}`

`void simmem_write8(oraddr_t addr, uint8_t value, void *dat)`	`void simmem_write8(oraddr_t addr, uint8_t value, void *dat)`
`{`	`{`
`(uint8_t )(dat + ((addr & ~ADDR_C(3)) \| (3 - addr & 3))) = value;`	`(uint8_t )(dat + ((addr & ~ADDR_C(3)) \| (3 - (addr & 3)))) = value;`
`}`	`}`

`uint32_t simmem_read_zero32(oraddr_t addr, void *dat)`	`uint32_t simmem_read_zero32(oraddr_t addr, void *dat)`
`{`	`{`
`if (config.sim.verbose)`	`if (config.sim.verbose)`