URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [support/] [simprintf.c] - Diff between revs 1493 and 1557

Rev 1493	Rev 1557
Line 36...	Line 36...

`#include "port.h"`	`#include "port.h"`
`#include "arch.h"`	`#include "arch.h"`
`#include "abstract.h"`	`#include "abstract.h"`
`#include "sim-config.h"`	`#include "sim-config.h"`
	`#include "opcode/or32.h"`
	`#include "spr_defs.h"`
	`#include "execute.h"`
`#include "debug.h"`	`#include "debug.h"`

`DEFAULT_DEBUG_CHANNEL(simprintf);`	`DEFAULT_DEBUG_CHANNEL(simprintf);`

`/* Length of PRINTF format string */`	`/* Length of PRINTF format string */`
Line 102...	Line 105...
`#if STACK_ARGS`	`#if STACK_ARGS`
`arg = eval_direct32(argaddr,1,0);`	`arg = eval_direct32(argaddr,1,0);`
`argaddr += 4;`	`argaddr += 4;`
`#else`	`#else`
`{`	`{`
`unsigned char regstr[5];`	`char regstr[5];`

`sprintf(regstr, "r%"PRIxADDR, ++argaddr);`	`sprintf(regstr, "r%"PRIxADDR, ++argaddr);`
`arg = evalsim_reg(atoi(regstr));`	`arg = evalsim_reg(atoi(regstr));`
`}`	`}`
`#endif`	`#endif`
`TRACE(" 4: fmtstrpart=%p fmtstrpart=%s arg=0x%08"PRIx32"\n",`	`TRACE(" 4: fmtstrpart=%p fmtstrpart=%s arg=0x%08"PRIx32"\n",`
`fmtstrpart, fmtstrpart, arg);`	`fmtstrpart, fmtstrpart, arg);`
`tmp = fmtstrpart;`	`tmp = fmtstrpart;`
`if (*tmp == '%') {`	`if (*tmp == '%') {`
`tmp++;`	`tmp++;`
`while (tmp == '-' \|\| tmp >= '0' && *tmp <= '9') tmp++;`	`while (tmp == '-' \|\| (tmp >= '0' && *tmp <= '9')) tmp++;`
`if (*tmp == 's') string = 1;`	`if (*tmp == 's') string = 1;`
`}`	`}`
`if (string) {`	`if (string) {`
`int len = 0;`	`int len = 0;`
`char *str;`	`char *str;`