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https://opencores.org/ocsvn/or1k/or1k/trunk
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Rev 823 |
Rev 884 |
Line 72... |
Line 72... |
unsigned long argaddr;
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unsigned long argaddr;
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unsigned char regstr[5];
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unsigned char regstr[5];
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char *fmtstrend;
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char *fmtstrend;
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char *fmtstrpart = fmtstr;
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char *fmtstrpart = fmtstr;
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int tee_exe_log;
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int tee_exe_log;
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extern long instructions;
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#if STACK_ARGS
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#if STACK_ARGS
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argaddr = stackaddr;
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argaddr = stackaddr;
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#else
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#else
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argaddr = 3;
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argaddr = 3;
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#endif
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#endif
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tee_exe_log = (config.sim.exe_log && (config.sim.exe_log_type == EXE_LOG_SOFTWARE || config.sim.exe_log_type == EXE_LOG_SIMPLE)
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tee_exe_log = (config.sim.exe_log && (config.sim.exe_log_type == EXE_LOG_SOFTWARE || config.sim.exe_log_type == EXE_LOG_SIMPLE)
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&& config.sim.exe_log_start <= instructions && (config.sim.exe_log_end <= 0 || instructions <= config.sim.exe_log_end));
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&& config.sim.exe_log_start <= runtime.cpu.instructions && (config.sim.exe_log_end <= 0 || runtime.cpu.instructions <= config.sim.exe_log_end));
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if (tee_exe_log)
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if (tee_exe_log)
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fprintf (runtime.sim.fexe_log, "SIMPRINTF: ");
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fprintf (runtime.sim.fexe_log, "SIMPRINTF: ");
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debug(6, "simprintf: %s\n", fmtstrpart);
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debug(6, "simprintf: %s\n", fmtstrpart);
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while(strlen(fmtstrpart)) {
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while(strlen(fmtstrpart)) {
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