URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 619 |
Rev 802 |
Line 105... |
Line 105... |
l.addi r22,r0,0
|
l.addi r22,r0,0
|
|
|
l.movhi r23,hi(RAM_START)
|
l.movhi r23,hi(RAM_START)
|
l.ori r23,r23,lo(RAM_START)
|
l.ori r23,r23,lo(RAM_START)
|
|
|
#
|
|
# unmask all ints
|
|
#
|
|
l.movhi r5,0xffff
|
|
l.ori r5,r5,0xffff
|
|
l.mtspr r0,r5,SPR_PICMR # set PICMR
|
|
|
|
# Set r20 to hold enable tick exception
|
# Set r20 to hold enable tick exception
|
l.mfspr r20,r0,SPR_SR
|
l.mfspr r20,r0,SPR_SR
|
l.ori r20,r20,SPR_SR_SM|SPR_SR_TEE|SPR_SR_F
|
l.ori r20,r20,SPR_SR_SM|SPR_SR_TEE|SPR_SR_F
|
|
|
# Set r21 to hold value of TTMR
|
# Set r21 to hold value of TTMR
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.