OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [before_ORP/] [uclinux/] [uClinux-2.0.x/] [sim.cfg] - Diff between revs 682 and 711

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 682 Rev 711
Line 115... Line 115... 
 
 
 
 
  device 1
 
  device 1
 
    name = "RAM"
 
    name = "RAM"
 
    ce = 1
 
    ce = 1
 
    baseaddr = 0x00000000
 
    baseaddr = 0x00000000
 
    size = 0x00200000
 
    size = 0x00400000
 
    delayr = 1
 
    delayr = 1
 
    delayw = 2
 
    delayw = 2
 
/*    log = "ram.log"*/
 
/*    log = "ram.log"*/
 
  enddevice
 
  enddevice
 
end
 
end
Line 285... Line 285... 
  /* verbose = 1 */
 
  /* verbose = 1 */
 
  debug = 0
 
  debug = 0
 
  profile = 0
 
  profile = 0
 
  prof_fn = "sim.profile"
 
  prof_fn = "sim.profile"
 
 
 
 
 
  history = 1
 
  history = 0
 
  /* iprompt = 0 */
 
  /* iprompt = 0 */
 
  exe_log = 0
 
  exe_log = 0
 
  exe_log_type = software
 
  exe_log_type = software
 
  exe_log_start = 12000000
 
  exe_log_start = 12500000
 
  exe_log_marker = 100
 
  exe_log_marker = 100
 
  exe_log_fn = "executed.log"
 
  exe_log_fn = "executed.log"
 
end
 
end
 
 
 
 
 
 
 
 
Line 453... Line 453... 
  nuarts = 1
 
  nuarts = 1
 
 
 
 
 
  device 0
 
  device 0
 
    baseaddr = 0x9c000000
 
    baseaddr = 0x9c000000
 
    irq = 15
 
    irq = 15
 
    rxfile = "/tmp/uart0.rx"
 
    rxfile = "uart0.rx"
 
    txfile = "/tmp/uart0.tx"
 
    txfile = "uart0.tx"
 
    jitter = -1                     /* async behaviour */
 
    jitter = -1                     /* async behaviour */
 
    16550 = 1
 
    16550 = 1
 
  enddevice
 
  enddevice
 
end
 
end
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.