| Line 240... |
Line 240... |
}
|
}
|
|
|
/* Sets a new SPR_SR_OV value, based on next register value */
|
/* Sets a new SPR_SR_OV value, based on next register value */
|
|
|
#if SET_OV_FLAG
|
#if SET_OV_FLAG
|
#define set_ov_flag(value) (((value) & 0x80000000 ? setsprbits (SPR_SR, SPR_SR_OV, 1) : setsprbits (SPR_SR, SPR_SR_OV, 0)), value)
|
#define set_ov_flag(value) if((value) & 0x80000000) setsprbits (SPR_SR, SPR_SR_OV, 1); else setsprbits (SPR_SR, SPR_SR_OV, 0)
|
#else
|
#else
|
#define set_ov_flag(value) (value)
|
#define set_ov_flag(value)
|
#endif
|
#endif
|
|
|
/* Modified by CZ 26/05/01 for new mode execution */
|
/* Modified by CZ 26/05/01 for new mode execution */
|
/* Fetch returns nonzero if instruction should NOT be executed. */
|
/* Fetch returns nonzero if instruction should NOT be executed. */
|
static inline int fetch()
|
static inline int fetch()
|
| Line 429... |
Line 429... |
unsigned long i = iqueue[0].insn_addr;
|
unsigned long i = iqueue[0].insn_addr;
|
|
|
if (i == 0xffffffff) return;
|
if (i == 0xffffffff) return;
|
if (config.sim.exe_log_start <= runtime.cpu.instructions && (config.sim.exe_log_end <= 0 || runtime.cpu.instructions <= config.sim.exe_log_end)) {
|
if (config.sim.exe_log_start <= runtime.cpu.instructions && (config.sim.exe_log_end <= 0 || runtime.cpu.instructions <= config.sim.exe_log_end)) {
|
if (config.sim.exe_log_marker && runtime.cpu.instructions % config.sim.exe_log_marker == 0) {
|
if (config.sim.exe_log_marker && runtime.cpu.instructions % config.sim.exe_log_marker == 0) {
|
fprintf (runtime.sim.fexe_log, "--------------------- %8i instruction ---------------------\n", runtime.cpu.instructions);
|
fprintf (runtime.sim.fexe_log, "--------------------- %8lli instruction ---------------------\n", runtime.cpu.instructions);
|
}
|
}
|
switch (config.sim.exe_log_type) {
|
switch (config.sim.exe_log_type) {
|
case EXE_LOG_HARDWARE:
|
case EXE_LOG_HARDWARE:
|
fprintf (runtime.sim.fexe_log, "\nEXECUTED(%11u): %.8lx: ", runtime.cpu.instructions, i);
|
fprintf (runtime.sim.fexe_log, "\nEXECUTED(%11llu): %.8lx: ", runtime.cpu.instructions, i);
|
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i), evalsim_mem8_void(i + 1));
|
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i), evalsim_mem8_void(i + 1));
|
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i + 2), evalsim_mem8_void(i + 3));
|
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i + 2), evalsim_mem8_void(i + 3));
|
for(i = 0; i < MAX_GPRS; i++) {
|
for(i = 0; i < MAX_GPRS; i++) {
|
if (i % 4 == 0)
|
if (i % 4 == 0)
|
fprintf(runtime.sim.fexe_log, "\n");
|
fprintf(runtime.sim.fexe_log, "\n");
|
| Line 488... |
Line 488... |
|
|
/* Dump registers - 'r' or 't' command */
|
/* Dump registers - 'r' or 't' command */
|
void dumpreg()
|
void dumpreg()
|
{
|
{
|
int i;
|
int i;
|
char temp[100];
|
|
unsigned long physical_pc;
|
unsigned long physical_pc;
|
|
|
if ((physical_pc = peek_into_itlb(iqueue[0].insn_addr))) {
|
if ((physical_pc = peek_into_itlb(iqueue[0].insn_addr))) {
|
/*
|
/*
|
* PRINTF("\t\t\tEA: %08x <--> PA: %08x\n", iqueue[0].insn_addr, physical_pc);
|
* PRINTF("\t\t\tEA: %08x <--> PA: %08x\n", iqueue[0].insn_addr, physical_pc);
|
