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Line 32... |
#include "branch_predict.h"
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#include "branch_predict.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "labels.h"
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#include "labels.h"
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#include "parse.h"
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#include "parse.h"
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#include "execute.h"
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#include "execute.h"
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#include "stats.h"
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#include "except.h"
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#include "except.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "debug_unit.h"
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#include "debug_unit.h"
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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#include "immu.h"
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#include "immu.h"
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#include "dmmu.h"
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#include "dmmu.h"
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#include "debug.h"
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#include "debug.h"
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#include "opcode/or32.h"
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#include "stats.h"
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/* General purpose registers. */
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/* General purpose registers. */
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machword reg[MAX_GPRS];
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machword reg[MAX_GPRS];
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/* Instruction queue */
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/* Instruction queue */
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Line 298... |
if (config.cpu.dependstats) {
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if (config.cpu.dependstats) {
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/* Dynamic, dependency stats. */
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/* Dynamic, dependency stats. */
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adddstats(icomplet[0].insn_index, current->insn_index, 1, check_depend());
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adddstats(icomplet[0].insn_index, current->insn_index, 1, check_depend());
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/* Dynamic, functional units stats. */
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/* Dynamic, functional units stats. */
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addfstats(icomplet[0].func_unit, current->func_unit, 1, check_depend());
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addfstats(or32_opcodes[icomplet[0].insn_index].func_unit,
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or32_opcodes[current->insn_index].func_unit, 1, check_depend());
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/* Dynamic, single stats. */
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/* Dynamic, single stats. */
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addsstats(current->insn_index, 1);
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addsstats(current->insn_index, 1);
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}
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}
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if (config.cpu.superscalar) {
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if (config.cpu.superscalar) {
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if ((current->func_unit == it_branch) || (current->func_unit == it_jump))
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if ((or32_opcodes[current->insn_index].func_unit == it_branch) ||
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(or32_opcodes[current->insn_index].func_unit == it_jump))
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runtime.sim.storecycles += 0;
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runtime.sim.storecycles += 0;
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if (current->func_unit == it_store)
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if (or32_opcodes[current->insn_index].func_unit == it_store)
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runtime.sim.storecycles += 1;
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runtime.sim.storecycles += 1;
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if (current->func_unit == it_load)
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if (or32_opcodes[current->insn_index].func_unit == it_load)
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runtime.sim.loadcycles += 1;
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runtime.sim.loadcycles += 1;
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#if 0
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#if 0
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if ((icomplet[0].func_unit == it_load) && check_depend())
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if ((icomplet[0].func_unit == it_load) && check_depend())
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runtime.sim.loadcycles++;
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runtime.sim.loadcycles++;
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#endif
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#endif
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/* Pseudo multiple issue benchmark */
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/* Pseudo multiple issue benchmark */
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if ((multissue[current->func_unit] < 1) || (check_depend())
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if ((multissue[or32_opcodes[current->insn_index].func_unit] < 1) ||
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|| (issued_per_cycle < 1)) {
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(check_depend()) || (issued_per_cycle < 1)) {
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int i;
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int i;
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for (i = 0; i < 20; i++)
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for (i = 0; i < 20; i++)
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multissue[i] = 2;
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multissue[i] = 2;
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issued_per_cycle = 2;
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issued_per_cycle = 2;
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runtime.cpu.supercycles++;
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runtime.cpu.supercycles++;
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Line 343... |
multissue[it_movimm] = 2;
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multissue[it_movimm] = 2;
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multissue[it_arith] = 2;
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multissue[it_arith] = 2;
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multissue[it_store] = 2;
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multissue[it_store] = 2;
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multissue[it_load] = 2;
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multissue[it_load] = 2;
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}
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}
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multissue[current->func_unit]--;
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multissue[or32_opcodes[current->insn_index].func_unit]--;
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issued_per_cycle--;
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issued_per_cycle--;
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}
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}
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if (config.cpu.dependstats)
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if (config.cpu.dependstats)
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/* Instruction waits in completition buffer until retired. */
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/* Instruction waits in completition buffer until retired. */
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Line 614... |
#if SIMPLE_EXECUTION
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#if SIMPLE_EXECUTION
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void l_invalid (struct iqueue_entry *current) {
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void l_invalid (struct iqueue_entry *current) {
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#else
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#else
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void l_invalid () {
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void l_invalid () {
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#endif
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#endif
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/* It would be hard to handle this case for statistics; we skip it
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since it should not occur anyway:
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IFF (config.cpu.dependstats) current->func_unit = it_unknown; */
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except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
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except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
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}
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}
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#if !SIMPLE_EXECUTION
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#if !SIMPLE_EXECUTION
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