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[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [cpu/] [or32/] [execute.c] - Diff between revs 1350 and 1352

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Rev 1350 Rev 1352
Line 109... Line 109...
 
 
/* Effective address of instructions that have an effective address.  This is
/* Effective address of instructions that have an effective address.  This is
 * only used to get dump_exe_log correct */
 * only used to get dump_exe_log correct */
static oraddr_t insn_ea;
static oraddr_t insn_ea;
 
 
 
/* History of execution */
 
struct hist_exec *hist_exec_tail = NULL;
 
 
/* Implementation specific.
/* Implementation specific.
   Get an actual value of a specific register. */
   Get an actual value of a specific register. */
 
 
uorreg_t evalsim_reg(unsigned int regno)
uorreg_t evalsim_reg(unsigned int regno)
{
{
Line 386... Line 389...
  if (config.cpu.dependstats)
  if (config.cpu.dependstats)
    /* Instruction waits in completition buffer until retired. */
    /* Instruction waits in completition buffer until retired. */
    memcpy (&icomplet[0], current, sizeof (struct iqueue_entry));
    memcpy (&icomplet[0], current, sizeof (struct iqueue_entry));
 
 
  if (config.sim.history) {
  if (config.sim.history) {
    int i;
 
 
 
    /* History of execution */
    /* History of execution */
    for (i = HISTEXEC_LEN - 1; i; i--)
    hist_exec_tail = hist_exec_tail->next;
      histexec[i] = histexec[i - 1];
    hist_exec_tail->addr = icomplet[0].insn_addr;
    histexec[0] = icomplet[0].insn_addr;        /* add last insn */
 
  }
  }
 
 
  if (config.sim.exe_log) dump_exe_log();
  if (config.sim.exe_log) dump_exe_log();
}
}
 
 
Line 616... Line 616...
 
 
/* Reset the CPU */
/* Reset the CPU */
void cpu_reset()
void cpu_reset()
{
{
  int i;
  int i;
 
  struct hist_exec *hist_exec_head = NULL;
 
  struct hist_exec *hist_exec_new;
 
 
  runtime.sim.cycles = 0;
  runtime.sim.cycles = 0;
  runtime.sim.loadcycles = 0;
  runtime.sim.loadcycles = 0;
  runtime.sim.storecycles = 0;
  runtime.sim.storecycles = 0;
  runtime.cpu.instructions = 0;
  runtime.cpu.instructions = 0;
  runtime.cpu.supercycles = 0;
  runtime.cpu.supercycles = 0;
Line 632... Line 635...
  sbuf_head = 0;
  sbuf_head = 0;
  sbuf_tail = 0;
  sbuf_tail = 0;
  sbuf_count = 0;
  sbuf_count = 0;
  sbuf_prev_cycles = 0;
  sbuf_prev_cycles = 0;
 
 
 
  /* Initialise execution history circular buffer */
 
  for (i = 0; i < HISTEXEC_LEN; i++) {
 
    hist_exec_new = malloc(sizeof(struct hist_exec));
 
    if(!hist_exec_new) {
 
      fprintf(stderr, "Out-of-memory\n");
 
      exit(1);
 
    }
 
    if(!hist_exec_head)
 
      hist_exec_head = hist_exec_new;
 
    else
 
      hist_exec_tail->next = hist_exec_new;
 
 
 
    hist_exec_new->prev = hist_exec_tail;
 
    hist_exec_tail = hist_exec_new;
 
  }
 
  /* Make hist_exec_tail->next point to hist_exec_head */
 
  hist_exec_tail->next = hist_exec_head;
 
  hist_exec_head->prev = hist_exec_tail;
 
 
  /* Cpu configuration */
  /* Cpu configuration */
  mtspr(SPR_UPR, config.cpu.upr);
  mtspr(SPR_UPR, config.cpu.upr);
  setsprbits(SPR_VR, SPR_VR_VER, config.cpu.ver);
  setsprbits(SPR_VR, SPR_VR_VER, config.cpu.ver);
  setsprbits(SPR_VR, SPR_VR_REV, config.cpu.rev);
  setsprbits(SPR_VR, SPR_VR_REV, config.cpu.rev);
  mtspr(SPR_SR, config.cpu.sr);
  mtspr(SPR_SR, config.cpu.sr);

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