OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [cpu/] [or32/] [execute.c] - Diff between revs 619 and 620

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 619 Rev 620
Line 40... Line 40...
 
 
/* Whether instructions set overflow flag */
/* Whether instructions set overflow flag */
#define SET_OV_FLAG     1
#define SET_OV_FLAG     1
 
 
/* Whether arithmethic instructions set flag on zero */
/* Whether arithmethic instructions set flag on zero */
#define ARITH_SET_FLAG  0
#define ARITH_SET_FLAG  1
 
 
/* General purpose registers. */
/* General purpose registers. */
machword reg[MAX_GPRS];
machword reg[MAX_GPRS];
 
 
/* Instruction queue */
/* Instruction queue */
Line 666... Line 666...
 
 
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  temp1 = (signed long)eval_operand32(2, &breakpoint)+(signed long)eval_operand32(1, &breakpoint);
  temp1 = (signed long)eval_operand32(2, &breakpoint)+(signed long)eval_operand32(1, &breakpoint);
  set_operand32(0, temp1, &breakpoint);
  set_operand32(0, temp1, &breakpoint);
  set_ov_flag (temp1);
  set_ov_flag (temp1);
 
  if (ARITH_SET_FLAG) {
  flag = temp1 == 0;
  flag = temp1 == 0;
  setsprbits(SPR_SR, SPR_SR_F, flag);
  setsprbits(SPR_SR, SPR_SR_F, flag);
 
  }
 
 
  temp4 = temp1;
  temp4 = temp1;
  if (temp4 == temp1)
  if (temp4 == temp1)
    mstats.byteadd++;
    mstats.byteadd++;
}
}
Line 733... Line 735...
}
}
void l_and() {
void l_and() {
  unsigned long temp1;
  unsigned long temp1;
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, temp1 = set_ov_flag (eval_operand32(1, &breakpoint) & (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
  set_operand32(0, temp1 = set_ov_flag (eval_operand32(1, &breakpoint) & (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
 
  if (ARITH_SET_FLAG) {
  flag = temp1 == 0;
  flag = temp1 == 0;
  setsprbits(SPR_SR, SPR_SR_F, flag);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
}
 
}
void l_or() {
void l_or() {
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) | (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) | (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
}
}
void l_xor() {
void l_xor() {

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.