Line 60... |
Line 60... |
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|
uarts[uartchip].char_clks *= bauds_per_char;
|
uarts[uartchip].char_clks *= bauds_per_char;
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}
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}
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|
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/* Set a specific UART register with value. */
|
/* Set a specific UART register with value. */
|
void uart_write8(unsigned long addr, unsigned char value)
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void uart_write_byte(unsigned long addr, unsigned long value)
|
{
|
{
|
int chipsel;
|
int chipsel;
|
|
|
debug("uart_write8(%x,%02x)\n", addr, (unsigned)value);
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debug("uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
|
|
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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break;
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break;
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else if (chipsel == NR_UARTS)
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else if (chipsel == NR_UARTS)
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Line 118... |
Line 118... |
set_char_clks(chipsel);
|
set_char_clks(chipsel);
|
return;
|
return;
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}
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}
|
|
|
/* Read a specific UART register. */
|
/* Read a specific UART register. */
|
unsigned char uart_read8(unsigned long addr)
|
unsigned long uart_read_byte(unsigned long addr)
|
{
|
{
|
unsigned char value = 0;
|
unsigned char value = 0;
|
int chipsel;
|
int chipsel;
|
|
|
debug("uart_read8(%x)\n", addr);
|
debug("uart_read_byte(%x)\n", addr);
|
|
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
|
break;
|
break;
|
else if (chipsel == NR_UARTS)
|
else if (chipsel == NR_UARTS)
|
Line 207... |
Line 207... |
if (uarts[i].txfs && uarts[i].txfs) {
|
if (uarts[i].txfs && uarts[i].txfs) {
|
printf("UART%d at 0x%.8x uses ", i, uarts[i].baseaddr);
|
printf("UART%d at 0x%.8x uses ", i, uarts[i].baseaddr);
|
printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
|
printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
|
} else
|
} else
|
printf("UART%d has problems with TX file stream.\n", i);
|
printf("UART%d has problems with TX file stream.\n", i);
|
register_memoryarea(uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read8, uart_write8, 0);
|
register_memoryarea(uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte, 0);
|
}
|
}
|
}
|
}
|
|
|
/* Simulation hook. Must be called every clock cycle to simulate all UART
|
/* Simulation hook. Must be called every clock cycle to simulate all UART
|
devices. It does internal functional UART simulation. */
|
devices. It does internal functional UART simulation. */
|