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Rev 133 |
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Line 27... |
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#include "tick.h"
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#include "tick.h"
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#include "../cpu/or1k/spr_defs.h"
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#include "../cpu/or1k/spr_defs.h"
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#include "pic.h"
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#include "pic.h"
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/* For mode 10 only: timer stops until we write into TTCR. */
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int tt_stopped = 0;
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/* Reset. It initializes TTCR register. */
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/* Reset. It initializes TTCR register. */
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void tick_reset()
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void tick_reset()
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{
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{
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printf("Resetting Tick Timer.\n");
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printf("Resetting Tick Timer.\n");
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTCR, 0);
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mtspr(SPR_TTIR, 0);
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mtspr(SPR_TTMR, 0);
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tt_stopped = 0;
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}
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}
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/* Simulation hook. Must be called every clock cycle to simulate tick
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/* Simulation hook. Must be called every clock cycle to simulate tick
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timer. It does internal functional tick timer simulation. */
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timer. It does internal functional tick timer simulation. */
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void tick_clock()
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void tick_clock()
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{
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{
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unsigned long ttcr;
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unsigned long ttcr;
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unsigned long ttir;
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unsigned long ttmr;
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ttcr = mfspr(SPR_TTCR);
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ttcr = mfspr(SPR_TTCR);
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ttir = mfspr(SPR_TTIR);
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ttmr = mfspr(SPR_TTMR);
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if (!(ttcr & SPR_TTCR_TTE))
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if (!(ttmr & SPR_TTMR_M) || tt_stopped)
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return;
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return;
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if ((ttir & SPR_TTCR_PERIOD) == (ttcr & SPR_TTCR_PERIOD)) {
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if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
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if (ttcr & SPR_TTCR_IE) {
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if (ttmr & SPR_TTMR_IE) {
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setsprbits(SPR_TTCR, SPR_TTCR_IP, 1);
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setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
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report_interrupt(INT_TICK);
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report_interrupt(INT_TICK);
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}
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}
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if (ttcr & SPR_TTCR_SR)
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if (ttmr & SPR_TTMR_M == 1) {
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/* Mode 01: Restart timer. */
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ttcr = 0;
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mtspr(SPR_TTCR, ttcr);
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return;
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} else if (ttmr & SPR_TTMR_M == 2) {
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/* Mode 10: Temporarly stop timer. */
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tt_stopped = 1;
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return;
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return;
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}
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}
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ttir++;
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}
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mtspr(SPR_TTIR, ttir);
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if (!tt_stopped)
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ttcr++;
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mtspr(SPR_TTCR, ttcr);
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}
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}
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