URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_36/] [or1ksim/] [cache/] [icache_model.c] - Diff between revs 992 and 997

Rev 992	Rev 997
Line 47...	Line 47...
`} ic[MAX_IC_SETS];`	`} ic[MAX_IC_SETS];`

`void ic_info()`	`void ic_info()`
`{`	`{`
`if (!testsprbits(SPR_UPR, SPR_UPR_ICP)) {`	`if (!testsprbits(SPR_UPR, SPR_UPR_ICP)) {`
`printf("ICache not implemented. Set UPR[ICP].\n");`	`PRINTF("ICache not implemented. Set UPR[ICP].\n");`
`return;`	`return;`
`}`	`}`

`printf("Instruction cache %dKB: ", config.ic.nsets * config.ic.blocksize * config.ic.nways / 1024);`	`PRINTF("Instruction cache %dKB: ", config.ic.nsets * config.ic.blocksize * config.ic.nways / 1024);`
`printf("%d ways, %d sets, block size %d bytes\n", config.ic.nways, config.ic.nsets, config.ic.blocksize);`	`PRINTF("%d ways, %d sets, block size %d bytes\n", config.ic.nways, config.ic.nsets, config.ic.blocksize);`
`}`	`}`

`/* First check if instruction is already in the cache and if it is:`	`/* First check if instruction is already in the cache and if it is:`
`- increment IC read hit stats,`	`- increment IC read hit stats,`
`- set 'lru' at this way to config.ic.ustates - 1 and`	`- set 'lru' at this way to config.ic.ustates - 1 and`