| Line 122... |
Line 122... |
config.dc.store_missdelay = 0;
|
config.dc.store_missdelay = 0;
|
|
|
/* Memory Controller */
|
/* Memory Controller */
|
config.mc.enabled = 0;
|
config.mc.enabled = 0;
|
|
|
/* DMAs */
|
|
config.ndmas = 0;
|
|
|
|
/* CPU */
|
/* CPU */
|
config.cpu.superscalar = 0;
|
config.cpu.superscalar = 0;
|
config.sim.history = 0;
|
config.sim.history = 0;
|
config.cpu.hazards = 0;
|
config.cpu.hazards = 0;
|
config.cpu.dependstats = 0;
|
config.cpu.dependstats = 0;
|
| Line 896... |
Line 893... |
" using --output-cfg switch (cfg file '%s'). */\n"
|
" using --output-cfg switch (cfg file '%s'). */\n"
|
"const static struct config config = {\n", runtime.sim.script_fn);
|
"const static struct config config = {\n", runtime.sim.script_fn);
|
|
|
fprintf (f, " tick:{enabled:%i},\n", config.tick.enabled);
|
fprintf (f, " tick:{enabled:%i},\n", config.tick.enabled);
|
|
|
fprintf (f, " ndmas:%i, dmas:{", config.ndmas);
|
|
comma = 0;
|
|
for (i = 0; i < config.ndmas; i++) {
|
|
fprintf (f, "%s\n {baseaddr:0x%08lx, irq:%i, vapi_id:0x%08lx}",
|
|
comma ? "," :"", config.dmas[i].baseaddr, config.dmas[i].irq, config.dmas[i].vapi_id);
|
|
comma = 1;
|
|
}
|
|
fprintf (f, "},\n");
|
|
|
|
fprintf (f, " nethernets:%i, ethernets:{", config.nethernets);
|
fprintf (f, " nethernets:%i, ethernets:{", config.nethernets);
|
comma = 0;
|
comma = 0;
|
for (i = 0; i < config.nethernets; i++) {
|
for (i = 0; i < config.nethernets; i++) {
|
fprintf (f, "%s\n {baseaddr:0x%08lx, dma:%i, tx_channel:0x%08x, rx_channel:0x%08x, rxfile:\"%s\", txfile:\"%s\", vapi_id:0x%08lx}",
|
fprintf (f, "%s\n {baseaddr:0x%08lx, dma:%i, tx_channel:0x%08x, rx_channel:0x%08x, rxfile:\"%s\", txfile:\"%s\", vapi_id:0x%08lx}",
|
comma ? "," :"", config.ethernets[i].baseaddr, config.ethernets[i].dma, config.ethernets[i].tx_channel, config.ethernets[i].rx_channel,
|
comma ? "," :"", config.ethernets[i].baseaddr, config.ethernets[i].dma, config.ethernets[i].tx_channel, config.ethernets[i].rx_channel,
|
