OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_42/] [or1ksim/] [cpu/] [or32/] [generate.c] - Diff between revs 1290 and 1308

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 1290 Rev 1308
Line 44... Line 44...
unsigned long op[MAX_OPERANDS];
unsigned long op[MAX_OPERANDS];
int num_op;
int num_op;
 
 
inline void debug(int level, const char *format, ...)
inline void debug(int level, const char *format, ...)
{
{
 
#if DEBUG
  char *p;
  char *p;
  va_list ap;
  va_list ap;
 
 
#if DEBUG
 
  if ((p = malloc(1000)) == NULL)
  if ((p = malloc(1000)) == NULL)
    return;
    return;
  va_start(ap, format);
  va_start(ap, format);
  (void) vsnprintf(p, 1000, format, ap);
  (void) vsnprintf(p, 1000, format, ap);
  va_end(ap);
  va_end(ap);
Line 197... Line 197...
  while (1)
  while (1)
    {
    {
      int nbits = 0, first = 1;
      int nbits = 0, first = 1;
      while (1)
      while (1)
        {
        {
          SHIFT; fprintf (fo, "tmp %s= ((insn  >> %i) & 0x%08x) << %i;\n", first ? "" : "|", opd->type & OPTYPE_SHR, (1 << opd->data) - 1, nbits);
          SHIFT;
 
          fprintf (fo, "tmp %s= ((insn  >> %li) & 0x%08x) << %i;\n",
 
                   first ? "" : "|", opd->type & OPTYPE_SHR,
 
                   (1 << opd->data) - 1, nbits);
          nbits += opd->data;
          nbits += opd->data;
          if (opd->type & OPTYPE_OP)
          if (opd->type & OPTYPE_OP)
            break;
            break;
          opd++;
          opd++;
          first = 0;
          first = 0;
Line 345... Line 348...
       (based on or32_opcodes this should be the only possibility,
       (based on or32_opcodes this should be the only possibility,
       but in case of invalid/missing instruction we must perform a check)  */
       but in case of invalid/missing instruction we must perform a check)  */
 
 
    if (ti[i].insn_mask != cur_mask) {
    if (ti[i].insn_mask != cur_mask) {
      fprintf (fo, "\n");
      fprintf (fo, "\n");
      SHIFT; fprintf (fo, "/* Not unique: real mask %08x and current mask %08x differ - do final check */\n", ti[i].insn_mask, cur_mask);
      SHIFT;
      SHIFT; fprintf (fo, "if ((insn & 0x%08x) == 0x%08x) ", ti[i].insn_mask, ti[i].insn);
      fprintf (fo, "/* Not unique: real mask %08lx and current mask %08lx differ - do final check */\n", ti[i].insn_mask, cur_mask);
 
      SHIFT; fprintf (fo, "if ((insn & 0x%08lx) == 0x%08lx) ", ti[i].insn_mask, ti[i].insn);
      if (output_call (fo, i, level)) return 1;         // Fail
      if (output_call (fo, i, level)) return 1;         // Fail
      fprintf (fo, " else ");
      fprintf (fo, " else ");
      if (output_call (fo, -1, level)) return 1;                // Fail
      if (output_call (fo, -1, level)) return 1;                // Fail
    } else {
    } else {
      if (output_call (fo, i, level - 1)) return 1;             // Fail
      if (output_call (fo, i, level - 1)) return 1;             // Fail

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.