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[/] [or1k/] [tags/] [nog_patch_43/] [or1ksim/] [peripheral/] [16450.c] - Diff between revs 423 and 424

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Rev 423 Rev 424
Line 37... Line 37...
#include "pic.h"
#include "pic.h"
#include "vapi.h"
#include "vapi.h"
 
 
#define MIN(a,b) ((a) < (b) ? (a) : (b))
#define MIN(a,b) ((a) < (b) ? (a) : (b))
 
 
static struct dev_16450 uarts[NR_UARTS];
static struct dev_16450 uarts[MAX_UARTS];
static int thre_int;
static int thre_int;
 
 
/* Number of clock cycles (one clock cycle is one call to the uart_clock())
/* Number of clock cycles (one clock cycle is one call to the uart_clock())
   before a single character is transmitted or received. */
   before a single character is transmitted or received. */
static unsigned long char_clks(int dll, int dlh, int lcr)
static unsigned long char_clks(int dll, int dlh, int lcr)
Line 71... Line 71...
{
{
  int chipsel;
  int chipsel;
 
 
  debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
  debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
 
 
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
  for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
      break;
      break;
  if (chipsel >= NR_UARTS) return;
  if (chipsel >= MAX_UARTS) return;
 
 
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    switch (addr % UART_ADDR_SPACE) {
      case UART_DLL:
      case UART_DLL:
        uarts[chipsel].regs.dll = value;
        uarts[chipsel].regs.dll = value;
Line 146... Line 146...
  unsigned char value = 0;
  unsigned char value = 0;
  int chipsel;
  int chipsel;
 
 
  debug(4, "uart_read_byte(%x)", addr);
  debug(4, "uart_read_byte(%x)", addr);
 
 
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
  for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
      break;
      break;
 
 
  if (chipsel >= NR_UARTS)
  if (chipsel >= MAX_UARTS)
    return 0;
    return 0;
 
 
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    switch (addr % UART_ADDR_SPACE) {
      case UART_DLL:
      case UART_DLL:

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