URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_46/] [or1ksim/] [sim.cfg] - Diff between revs 243 and 261

Rev 243	Rev 261
Line 1...	Line 1...

`section mc`	`section mc`
`memory_table_file = sim.mem`	`enabled = 1`
`enable = 1`	`baseaddr = 0xa0000000`
`POC = 0x00000008`	`memory_table_file = "simmem.cfg"`
	`POC = 0x00000008 /* Power on configuration register */`
	`end`

	`section uart`
	`enabled = 1`
	`nuarts = 1`

	`device 0`
	`baseaddr = 0x80000000`
	`rxfile = "/tmp/uart0.rx"`
	`txfile = "/tmp/uart0.tx"`
	`jitter = -1 /* async behaviour */`
	`enddevice`
	`end`

	`section dma`
	`enabled = 1`
	`ndmas = 1`

	`device 0`
	`baseaddr = 0x90000000`
	`irq = 4`
	`enddevice`
`end`	`end`