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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [common/] [abstract.c] - Diff between revs 1375 and 1386

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Rev 1375 Rev 1386
Line 347... Line 347...
  if (!cur_area) {
  if (!cur_area) {
    PRINTF("EXCEPTION: read out of memory (32-bit access to %"PRIxADDR")\n",
    PRINTF("EXCEPTION: read out of memory (32-bit access to %"PRIxADDR")\n",
           memaddr);
           memaddr);
    except_handle(EXCEPT_BUSERR, cur_vadd);
    except_handle(EXCEPT_BUSERR, cur_vadd);
    temp = 0;
    temp = 0;
  }
  } else if (cur_area->log)
 
 
  if (!pending.valid && cur_area->log)
 
    fprintf (cur_area->log, "[%"PRIxADDR"] -> read %08"PRIx32"\n", memaddr, temp);
    fprintf (cur_area->log, "[%"PRIxADDR"] -> read %08"PRIx32"\n", memaddr, temp);
 
 
  if (config.debug.enabled)
  if (config.debug.enabled)
    *breakpoint += CheckDebugUnit(DebugLoadData,temp);  /* MM170901 */
    *breakpoint += CheckDebugUnit(DebugLoadData,temp);  /* MM170901 */
  return temp;
  return temp;
}
}
 
 
Line 378... Line 377...
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
 
 
  memaddr = dmmu_translate(memaddr, 0);
  memaddr = dmmu_translate(memaddr, 0);
  if (pending.valid)
  if (except_pending)
    return 0;
    return 0;
 
 
  if (config.dc.enabled)
  if (config.dc.enabled)
    temp = dc_simulate_read(memaddr, 4);
    temp = dc_simulate_read(memaddr, 4);
  else {
  else {
Line 444... Line 443...
  uint32_t temp;
  uint32_t temp;
 
 
  if (config.sim.mprofile)
  if (config.sim.mprofile)
    mprofile (memaddr, MPROF_32 | MPROF_FETCH);
    mprofile (memaddr, MPROF_32 | MPROF_FETCH);
//  memaddr = simulate_ic_mmu_fetch(memaddr);
//  memaddr = simulate_ic_mmu_fetch(memaddr);
  cur_vadd = pc;
 
 
 
  // I think this does not belong into eval_insn() 2004-01-30 HP
  cur_vadd = memaddr;
//  if (config.debug.enabled)
 
//    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
  memaddr = immu_translate(memaddr);
 
 
  // We could place the CheckDebugUnit(DebugInstructionFetch) here, but it is currently done
  if (except_pending)
  // in decode_execute_wrapper, so I leave it like this. 2004-01-30 HP
    return 0;
 
 
 
  if (config.debug.enabled)
 
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr);
 
 
  if (config.ic.enabled)
  if (config.ic.enabled)
    temp = ic_simulate_fetch(memaddr);
    temp = ic_simulate_fetch(memaddr);
  else {
  else {
    temp = evalsim_mem32(memaddr);
    temp = evalsim_mem32(memaddr);
Line 465... Line 466...
      except_handle(EXCEPT_BUSERR, cur_vadd);
      except_handle(EXCEPT_BUSERR, cur_vadd);
      temp = 0;
      temp = 0;
    }
    }
  }
  }
 
 
  // I think this does not belong into eval_insn() 2004-01-30 HP
  if (config.debug.enabled)
//  if (config.debug.enabled)
    *breakpoint += CheckDebugUnit(DebugLoadData,temp);
//    *breakpoint += CheckDebugUnit(DebugLoadData,temp);  /* MM170901 */
 
  return temp;
  return temp;
}
}
 
 
/* Returns 16-bit values from mem array. Big endian version.
/* Returns 16-bit values from mem array. Big endian version.
 *
 *
Line 493... Line 493...
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
 
 
  memaddr = dmmu_translate(memaddr, 0);
  memaddr = dmmu_translate(memaddr, 0);
  if (pending.valid)
  if (except_pending)
    return 0;
    return 0;
 
 
  if (config.dc.enabled)
  if (config.dc.enabled)
    temp = (unsigned short)dc_simulate_read(memaddr, 2);
    temp = (uint16_t)dc_simulate_read(memaddr, 2);
  else {
  else {
    temp = evalsim_mem16(memaddr);
    temp = evalsim_mem16(memaddr);
    if (!cur_area) {
    if (!cur_area) {
      PRINTF("EXCEPTION: read out of memory (16-bit access to %"PRIxADDR")\n",
      PRINTF("EXCEPTION: read out of memory (16-bit access to %"PRIxADDR")\n",
             memaddr);
             memaddr);
Line 565... Line 565...
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr);  /* 28/05/01 CZ */
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
 
 
  memaddr = dmmu_translate(memaddr, 0);
  memaddr = dmmu_translate(memaddr, 0);
  if (pending.valid)
  if (except_pending)
    return 0;
    return 0;
 
 
  if (config.dc.enabled)
  if (config.dc.enabled)
    temp = (unsigned char)dc_simulate_read(memaddr, 1);
    temp = (uint8_t)dc_simulate_read(memaddr, 1);
  else {
  else {
    temp = evalsim_mem8(memaddr);
    temp = evalsim_mem8(memaddr);
    if (!cur_area) {
    if (!cur_area) {
      PRINTF("EXCEPTION: read out of memory (8-bit access to %"PRIxADDR")\n",
      PRINTF("EXCEPTION: read out of memory (8-bit access to %"PRIxADDR")\n",
             memaddr);
             memaddr);
Line 772... Line 772...
  }
  }
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
  memaddr = dmmu_translate(memaddr, 1);;
  memaddr = dmmu_translate(memaddr, 1);;
  /* If we produced exception don't set anything */
  /* If we produced exception don't set anything */
  if (pending.valid)
  if (except_pending)
    return;
    return;
 
 
  if (config.debug.enabled) {
  if (config.debug.enabled) {
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
Line 836... Line 836...
  }
  }
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
  memaddr = dmmu_translate(memaddr, 1);;
  memaddr = dmmu_translate(memaddr, 1);;
  /* If we produced exception don't set anything */
  /* If we produced exception don't set anything */
  if (pending.valid)
  if (except_pending)
    return;
    return;
 
 
  if (config.debug.enabled) {
  if (config.debug.enabled) {
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
Line 893... Line 893...
    mprofile (memaddr, MPROF_8 | MPROF_WRITE);
    mprofile (memaddr, MPROF_8 | MPROF_WRITE);
 
 
  cur_vadd = memaddr;
  cur_vadd = memaddr;
  memaddr = dmmu_translate(memaddr, 1);;
  memaddr = dmmu_translate(memaddr, 1);;
  /* If we produced exception don't set anything */
  /* If we produced exception don't set anything */
  if (pending.valid) return;
  if (except_pending) return;
 
 
  if (config.debug.enabled) {
  if (config.debug.enabled) {
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr);  /* 28/05/01 CZ */
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
    *breakpoint += CheckDebugUnit(DebugStoreData,value);
  }
  }
 
 
  dc_simulate_write(memaddr, (unsigned long)value, 1);
  dc_simulate_write(memaddr, value, 1);
 
 
  if (cur_area && cur_area->log)
  if (cur_area && cur_area->log)
    fprintf (cur_area->log, "[%"PRIxADDR"] -> write %02"PRIx8"\n", memaddr,
    fprintf (cur_area->log, "[%"PRIxADDR"] -> write %02"PRIx8"\n", memaddr,
             value);
             value);
}
}

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