URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [common/] [stats.c] - Diff between revs 615 and 626

Rev 615	Rev 626
Line 267...	Line 267...
`case 5:`	`case 5:`
`printf("stats 5: Raw register usage over time\n");`	`printf("stats 5: Raw register usage over time\n");`
`for(i = 0; (i < config.cpu.raw_range); i++)`	`for(i = 0; (i < config.cpu.raw_range); i++)`
`printf(" Register set and reused in %d. cycle: %d cases\n", i, raw_stats.range[i]);`	`printf(" Register set and reused in %d. cycle: %d cases\n", i, raw_stats.range[i]);`
`break;`	`break;`
	`case 6:`
	`if (config.cpu.sbuf_len) {`
	`extern int sbuf_total_cyc, sbuf_wait_cyc;`
	`printf ("stats 6: Store buffer analysis\n");`
	`printf ("Number of total memory store cycles: %i\n", sbuf_total_cyc);`
	`printf ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);`
	`printf ("Number of memory cycles spared: %i, store speedup %3.2f%%\n", sbuf_total_cyc - sbuf_wait_cyc, (double)(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc);`
	`} else`
	`printf ("Store buffer analysis disabled. Enable it to see analysis results.\n");`
	`break;`
`default:`	`default:`
`printf ("Please specify a stats group (1-5).\n");`	`printf ("Please specify a stats group (1-6).\n");`
`break;`	`break;`
`}`	`}`
`#if 0`	`#if 0`
`printf("Byte ADD: %d instructions\n", mstats.byteadd);`	`printf("Byte ADD: %d instructions\n", mstats.byteadd);`
`#endif`	`#endif`