URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [common/] [stats.c] - Diff between revs 626 and 629

Rev 626	Rev 629
Line 271...	Line 271...
`break;`	`break;`
`case 6:`	`case 6:`
`if (config.cpu.sbuf_len) {`	`if (config.cpu.sbuf_len) {`
`extern int sbuf_total_cyc, sbuf_wait_cyc;`	`extern int sbuf_total_cyc, sbuf_wait_cyc;`
`printf ("stats 6: Store buffer analysis\n");`	`printf ("stats 6: Store buffer analysis\n");`
	`printf ("Using store buffer of length %i.\n", config.cpu.sbuf_len);`
`printf ("Number of total memory store cycles: %i\n", sbuf_total_cyc);`	`printf ("Number of total memory store cycles: %i\n", sbuf_total_cyc);`
`printf ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);`	`printf ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);`
`printf ("Number of memory cycles spared: %i, store speedup %3.2f%%\n", sbuf_total_cyc - sbuf_wait_cyc, (double)(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc);`	`printf ("Number of memory cycles spared: %i\n", sbuf_total_cyc - sbuf_wait_cyc);`
	`printf ("Store speedup %3.2f%%, total speedup %3.2f%%\n", 100.*(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc,`
	`100.*(sbuf_total_cyc - sbuf_wait_cyc)/cycles);`
`} else`	`} else`
`printf ("Store buffer analysis disabled. Enable it to see analysis results.\n");`	`printf ("Store buffer analysis disabled. Enable it to see analysis results.\n");`
`break;`	`break;`
`default:`	`default:`
`printf ("Please specify a stats group (1-6).\n");`	`printf ("Please specify a stats group (1-6).\n");`