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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [common/] [stats.c] - Diff between revs 713 and 884

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Rev 713 Rev 884
Line 195... Line 195...
  if (testsprbits(SPR_UPR, SPR_UPR_DMP)) {
  if (testsprbits(SPR_UPR, SPR_UPR_DMP)) {
    printf("DMMU read:  hit %d(%d%%), miss %d\n", dmmu_stats.loads_tlbhit, (dmmu_stats.loads_tlbhit * 100) / SD(dmmu_stats.loads_tlbhit + dmmu_stats.loads_tlbmiss), dmmu_stats.loads_tlbmiss);
    printf("DMMU read:  hit %d(%d%%), miss %d\n", dmmu_stats.loads_tlbhit, (dmmu_stats.loads_tlbhit * 100) / SD(dmmu_stats.loads_tlbhit + dmmu_stats.loads_tlbmiss), dmmu_stats.loads_tlbmiss);
  } else
  } else
    printf("No DMMU. Set UPR[DMP]\n");
    printf("No DMMU. Set UPR[DMP]\n");
 
 
  {
  printf("Additional LOAD CYCLES: %u  STORE CYCLES: %u\n", runtime.sim.loadcycles, runtime.sim.storecycles);
    extern int loadcycles, storecycles;
 
    printf("Additional LOAD CYCLES: %u  STORE CYCLES: %u\n", loadcycles, storecycles);
 
  }
 
}
}
 
 
void printstats(int which)
void printstats(int which)
{
{
  int i, all = 0, dependall = 0;
  int i, all = 0, dependall = 0;
Line 274... Line 271...
  case 6:
  case 6:
    if (config.cpu.sbuf_len) {
    if (config.cpu.sbuf_len) {
      extern int sbuf_total_cyc, sbuf_wait_cyc;
      extern int sbuf_total_cyc, sbuf_wait_cyc;
      printf ("stats 6: Store buffer analysis\n");
      printf ("stats 6: Store buffer analysis\n");
      printf ("Using store buffer of length %i.\n", config.cpu.sbuf_len);
      printf ("Using store buffer of length %i.\n", config.cpu.sbuf_len);
      printf ("Number of total memory store cycles: %i/%i\n", sbuf_total_cyc, cycles + sbuf_total_cyc - sbuf_wait_cyc);
      printf ("Number of total memory store cycles: %i/%i\n", sbuf_total_cyc, runtime.sim.cycles + sbuf_total_cyc - sbuf_wait_cyc);
      printf ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);
      printf ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);
      printf ("Number of memory cycles spared: %i\n", sbuf_total_cyc - sbuf_wait_cyc);
      printf ("Number of memory cycles spared: %i\n", sbuf_total_cyc - sbuf_wait_cyc);
      printf ("Store speedup %3.2f%%, total speedup %3.2f%%\n", 100.*(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc,
      printf ("Store speedup %3.2f%%, total speedup %3.2f%%\n", 100.*(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc,
                                                                100.*(sbuf_total_cyc - sbuf_wait_cyc) / (cycles + sbuf_total_cyc - sbuf_wait_cyc));
                                                                100.*(sbuf_total_cyc - sbuf_wait_cyc) / (runtime.sim.cycles + sbuf_total_cyc - sbuf_wait_cyc));
    } else
    } else
      printf ("Store buffer analysis disabled. Enable it to see analysis results.\n");
      printf ("Store buffer analysis disabled. Enable it to see analysis results.\n");
    break;
    break;
  default:
  default:
    printf ("Please specify a stats group (1-6).\n");
    printf ("Please specify a stats group (1-6).\n");

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