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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or32/] [generate.c] - Diff between revs 1342 and 1346

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Rev 1342 Rev 1346
Line 28... Line 28...
#include "opcode/or32.h"
#include "opcode/or32.h"
#include "abstract.h"
#include "abstract.h"
 
 
static char *in_file;
static char *in_file;
static char *out_file;
static char *out_file;
static unsigned long op[MAX_OPERANDS];
 
 
 
/* Whether this instruction stores something in register */
/* Whether this instruction stores something in register */
static int write_to_reg;
static int write_to_reg;
 
 
static int out_lines = 0;
static int out_lines = 0;
Line 127... Line 126...
 
 
  fclose(fi);
  fclose(fi);
  return 0;
  return 0;
}
}
 
 
/* Parses and puts operands into op[] structure.
/* Parses operands. */
   Replacement for eval_operands routine. */
 
 
 
static int
static int
gen_eval_operands (FILE *fo, int insn_index, int level)
gen_eval_operands (FILE *fo, int insn_index, int level)
{
{
  struct insn_op_struct *opd = op_start[insn_index];
  struct insn_op_struct *opd = op_start[insn_index];
Line 140... Line 138...
  int num_ops;
  int num_ops;
  int nbits = 0;
  int nbits = 0;
  int set_param = 0;
  int set_param = 0;
  int dis = 0;
  int dis = 0;
  int sbit;
  int sbit;
 
  int dis_op = -1;
 
 
  write_to_reg = 0;
  write_to_reg = 0;
 
 
  shift_fprintf (level, fo, "unsigned long ");
  shift_fprintf (level, fo, "unsigned long ");
 
 
Line 186... Line 185...
                     'a' + num_ops, opd->type & OPTYPE_SHR,
                     'a' + num_ops, opd->type & OPTYPE_SHR,
                     (1 << opd->data) - 1, nbits);
                     (1 << opd->data) - 1, nbits);
 
 
    nbits += opd->data;
    nbits += opd->data;
 
 
    if (opd->type & OPTYPE_DIS) {
    if ((opd->type & OPTYPE_DIS) && (opd->type & OPTYPE_OP)) {
      sbit = (opd->type & OPTYPE_SBIT) >> OPTYPE_SBIT_SHR;
      sbit = (opd->type & OPTYPE_SBIT) >> OPTYPE_SBIT_SHR;
      if (opd->type & OPTYPE_SIG)
      if (opd->type & OPTYPE_SIG)
        shift_fprintf (level, fo, "if(%c & 0x%08x) %c |= 0x%x;\n",
        shift_fprintf (level, fo, "if(%c & 0x%08x) %c |= 0x%x;\n",
                       'a' + num_ops, 1 << sbit, 'a' + num_ops,
                       'a' + num_ops, 1 << sbit, 'a' + num_ops,
                       0xffffffff << sbit);
                       0xffffffff << sbit);
      opd++;
      opd++;
      shift_fprintf (level, fo, "(signed)%c += (signed)reg[(insn >> %i) & 0x%x];\n",
      shift_fprintf (level, fo, "(signed)%c += (signed)reg[(insn >> %i) & 0x%x];\n",
                     'a' + num_ops, opd->type & OPTYPE_SHR,
                     'a' + num_ops, opd->type & OPTYPE_SHR,
                     (1 << opd->data) - 1);
                     (1 << opd->data) - 1);
      dis = 1;
      dis = 1;
 
      dis_op = num_ops;
    }
    }
 
 
    if (opd->type & OPTYPE_OP) {
    if (opd->type & OPTYPE_OP) {
      sbit = (opd->type & OPTYPE_SBIT) >> OPTYPE_SBIT_SHR;
      sbit = (opd->type & OPTYPE_SBIT) >> OPTYPE_SBIT_SHR;
      if (opd->type & OPTYPE_SIG)
      if (opd->type & OPTYPE_SIG)
Line 218... Line 218...
          write_to_reg = 1;
          write_to_reg = 1;
      } else {
      } else {
        shift_fprintf (level, fo, "#define PARAM%i %c\n", num_ops,
        shift_fprintf (level, fo, "#define PARAM%i %c\n", num_ops,
                       'a' + num_ops);
                       'a' + num_ops);
      }
      }
 
 
      op[num_ops] = opd->type;
 
      if(dis)
 
        op[num_ops] |= OPTYPE_DIS;
 
      num_ops++;
      num_ops++;
      nbits = 0;
      nbits = 0;
      dis = 0;
      dis = 0;
    }
    }
 
 
Line 241... Line 237...
    shift_fprintf (level, fo, "#undef SET_PARAM\n");
    shift_fprintf (level, fo, "#undef SET_PARAM\n");
 
 
  for (i = 0; i < num_ops; i++)
  for (i = 0; i < num_ops; i++)
    shift_fprintf (level, fo, "#undef PARAM%i\n", i);
    shift_fprintf (level, fo, "#undef PARAM%i\n", i);
 
 
  return num_ops;
  return dis_op;
}
}
 
 
/* Generates decode and execute for one instruction instance */
/* Generates decode and execute for one instruction instance */
static int output_call (FILE *fo, int index, int level)
static int output_call (FILE *fo, int index, int level)
{
{
  int i;
  int dis_op = -1;
  int num_op;
 
 
 
  /*printf ("%i:%s\n", index, insn_name (index));*/
  /*printf ("%i:%s\n", index, insn_name (index));*/
 
 
  shift_fprintf (level++, fo, "{\n");
  shift_fprintf (level++, fo, "{\n");
 
 
  if (index >= 0)
  if (index >= 0)
    num_op = gen_eval_operands (fo, index, level);
    dis_op = gen_eval_operands (fo, index, level);
  else
 
    num_op = 0;
 
 
 
  if (index < 0) output_function (fo, "l_invalid", level);
  if (index < 0) output_function (fo, "l_invalid", level);
 
 
  fprintf (fo, "\n");
  fprintf (fo, "\n");
 
 
  shift_fprintf (level++, fo, "if (do_stats) {\n");
  shift_fprintf (level++, fo, "if (do_stats) {\n");
  shift_fprintf (level, fo, "num_op = %i;\n", num_op);
 
 
 
  if (num_op) shift_fprintf (level, fo, "op = &current->op[0];\n");
  if (dis_op >= 0)
 
    shift_fprintf (level, fo, "insn_ea = %c;\n", 'a' + dis_op);
 
 
  shift_fprintf (level, fo, "current->insn_index = %i;   /* \"%s\" */\n", index,
  shift_fprintf (level, fo, "current->insn_index = %i;   /* \"%s\" */\n", index,
                 insn_name (index));
                 insn_name (index));
 
 
  for (i = 0; i < num_op; i++) {
 
    shift_fprintf (level, fo, "op[%i] = %c;\n", i, 'a' + i);
 
    shift_fprintf (level, fo, "op[%i + MAX_OPERANDS] = 0x%08x;\n", i, op[i]);
 
  }
 
  shift_fprintf (level, fo, "analysis(current);\n");
  shift_fprintf (level, fo, "analysis(current);\n");
  shift_fprintf (--level, fo, "}\n");
  shift_fprintf (--level, fo, "}\n");
  if (write_to_reg)
  if (write_to_reg)
    shift_fprintf (level, fo, "reg[0] = 0; /* Repair in case we changed it */\n");
    shift_fprintf (level, fo, "reg[0] = 0; /* Repair in case we changed it */\n");
  shift_fprintf (--level, fo, "}\n");
  shift_fprintf (--level, fo, "}\n");

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