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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Diff between revs 884 and 997

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Rev 884 Rev 997
Line 143... Line 143...
  signed long temp3, temp2, temp1;
  signed long temp3, temp2, temp1;
 
 
  IFF (config.cpu.dependstats) current->func_unit = it_arith;
  IFF (config.cpu.dependstats) current->func_unit = it_arith;
  set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) * (signed long)eval_operand32(2, &breakpoint)), &breakpoint);
  set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) * (signed long)eval_operand32(2, &breakpoint)), &breakpoint);
  /*if (!(mcount++ & 1023)) {
  /*if (!(mcount++ & 1023)) {
    printf ("[%i]\n",mcount);
    PRINTF ("[%i]\n",mcount);
    }*/
    }*/
}
}
INSTRUCTION (l_div) {
INSTRUCTION (l_div) {
  signed long temp3, temp2, temp1;
  signed long temp3, temp2, temp1;
 
 
Line 268... Line 268...
  IFF (config.cpu.dependstats) current->func_unit = it_nop;
  IFF (config.cpu.dependstats) current->func_unit = it_nop;
  switch (k) {
  switch (k) {
    case NOP_NOP:
    case NOP_NOP:
      break;
      break;
    case NOP_EXIT:
    case NOP_EXIT:
      printf("exit(%d)\n", evalsim_reg32 (3));
      PRINTF("exit(%d)\n", evalsim_reg32 (3));
      if (config.debug.gdb_enabled)
      if (config.debug.gdb_enabled)
        set_stall_state (1);
        set_stall_state (1);
      else
      else
        runtime.sim.cont_run = 0;
        runtime.sim.cont_run = 0;
      break;
      break;
Line 280... Line 280...
      stackaddr = evalsim_reg32(4);
      stackaddr = evalsim_reg32(4);
      simprintf(stackaddr, evalsim_reg32(3));
      simprintf(stackaddr, evalsim_reg32(3));
      debug(5, "simprintf %x\n", stackaddr);
      debug(5, "simprintf %x\n", stackaddr);
      break;
      break;
    case NOP_REPORT:
    case NOP_REPORT:
      printf("report(0x%x);\n", evalsim_reg32(3));
      PRINTF("report(0x%x);\n", evalsim_reg32(3));
    default:
    default:
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
      printf("report %i (0x%x);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
      PRINTF("report %i (0x%x);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
      break;
      break;
  }
  }
}
}
INSTRUCTION (l_sfeq) {
INSTRUCTION (l_sfeq) {
  IFF (config.cpu.dependstats) current->func_unit = it_compare;
  IFF (config.cpu.dependstats) current->func_unit = it_compare;
Line 385... Line 385...
 
 
  IFF (config.cpu.dependstats) current->func_unit = it_move;
  IFF (config.cpu.dependstats) current->func_unit = it_move;
  if (mfspr(SPR_SR) & SPR_SR_SM)
  if (mfspr(SPR_SR) & SPR_SR_SM)
    mtspr(regno, value);
    mtspr(regno, value);
  else {
  else {
    printf("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
    PRINTF("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
    runtime.sim.cont_run = 0;
    runtime.sim.cont_run = 0;
  }
  }
}
}
INSTRUCTION (l_mfspr) {
INSTRUCTION (l_mfspr) {
  unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);
  unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);
Line 402... Line 402...
  IFF (config.cpu.dependstats) current->func_unit = it_move;
  IFF (config.cpu.dependstats) current->func_unit = it_move;
  if (mfspr(SPR_SR) & SPR_SR_SM)
  if (mfspr(SPR_SR) & SPR_SR_SM)
    set_operand32(0, value, &breakpoint);
    set_operand32(0, value, &breakpoint);
  else {
  else {
    set_operand32(0, 0, &breakpoint);
    set_operand32(0, 0, &breakpoint);
    printf("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
    PRINTF("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
    runtime.sim.cont_run = 0;
    runtime.sim.cont_run = 0;
  }
  }
}
}
INSTRUCTION (l_sys) {
INSTRUCTION (l_sys) {
  except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
  except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
Line 422... Line 422...
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  lo = mfspr (SPR_MACLO);
  lo = mfspr (SPR_MACLO);
  hi = mfspr (SPR_MACHI);
  hi = mfspr (SPR_MACHI);
  x = eval_operand32(0, &breakpoint);
  x = eval_operand32(0, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  PRINTF ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l += (LONGEST) x * (LONGEST) y;
  l += (LONGEST) x * (LONGEST) y;
 
 
  /* This implementation is very fast - it needs only one cycle for mac.  */
  /* This implementation is very fast - it needs only one cycle for mac.  */
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  hi = ((LONGEST)l) >> 32;
  hi = ((LONGEST)l) >> 32;
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACHI, hi);
  mtspr (SPR_MACHI, hi);
  printf ("(%08x,%08x)\n", hi, lo);
  PRINTF ("(%08x,%08x)\n", hi, lo);
}
}
INSTRUCTION (l_msb) {
INSTRUCTION (l_msb) {
  sprword lo, hi;
  sprword lo, hi;
  LONGEST l;
  LONGEST l;
  long x, y;
  long x, y;
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  lo = mfspr (SPR_MACLO);
  lo = mfspr (SPR_MACLO);
  hi = mfspr (SPR_MACHI);
  hi = mfspr (SPR_MACHI);
  x = eval_operand32(0, &breakpoint);
  x = eval_operand32(0, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  PRINTF ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l -= (LONGEST) eval_operand32(0, &breakpoint) * (LONGEST)eval_operand32(1, &breakpoint);
  l -= (LONGEST) eval_operand32(0, &breakpoint) * (LONGEST)eval_operand32(1, &breakpoint);
 
 
  /* This implementation is very fast - it needs only one cycle for msb.  */
  /* This implementation is very fast - it needs only one cycle for msb.  */
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  hi = ((LONGEST)l) >> 32;
  hi = ((LONGEST)l) >> 32;
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACHI, hi);
  mtspr (SPR_MACHI, hi);
  printf ("(%08x,%08x)\n", hi, lo);
  PRINTF ("(%08x,%08x)\n", hi, lo);
}
}
INSTRUCTION (l_macrc) {
INSTRUCTION (l_macrc) {
  sprword lo, hi;
  sprword lo, hi;
  LONGEST l;
  LONGEST l;
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  IFF (config.cpu.dependstats) current->func_unit = it_mac;
  /* No need for synchronization here -- all MAC instructions are 1 cycle long.  */
  /* No need for synchronization here -- all MAC instructions are 1 cycle long.  */
  lo =  mfspr (SPR_MACLO);
  lo =  mfspr (SPR_MACLO);
  hi =  mfspr (SPR_MACHI);
  hi =  mfspr (SPR_MACHI);
  l = (ULONGEST) lo | ((LONGEST)hi << 32);
  l = (ULONGEST) lo | ((LONGEST)hi << 32);
  l >>= 28;
  l >>= 28;
  //printf ("<%08x>\n", (unsigned long)l);
  //PRINTF ("<%08x>\n", (unsigned long)l);
  set_operand32(0, (long)l, &breakpoint);
  set_operand32(0, (long)l, &breakpoint);
  mtspr (SPR_MACLO, 0);
  mtspr (SPR_MACLO, 0);
  mtspr (SPR_MACHI, 0);
  mtspr (SPR_MACHI, 0);
}
}
INSTRUCTION (l_cmov) {
INSTRUCTION (l_cmov) {

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