Line 251... |
Line 251... |
}
|
}
|
|
|
if (!co) GEN ("/* NONE */");
|
if (!co) GEN ("/* NONE */");
|
if (f->nfdeps) {
|
if (f->nfdeps) {
|
GEN ("\n/* f. calls */, fstart_o, %sfend_i, fr11_i, ",
|
GEN ("\n/* f. calls */, fstart_o, %sfend_i, fr11_i, ",
|
log2 (f->nfdeps) > 0 ? "fid_o, " : "");
|
log2_int (f->nfdeps) > 0 ? "fid_o, " : "");
|
for (i = 0; i < 6; i++) GEN ("fr%i_o, ", i + 3);
|
for (i = 0; i < 6; i++) GEN ("fr%i_o, ", i + 3);
|
}
|
}
|
GEN ("\n start_i, end_o, busy_o);\n\n");
|
GEN ("\n start_i, end_o, busy_o);\n\n");
|
|
|
GEN ("parameter Tp = 1;\n\n");
|
GEN ("parameter Tp = 1;\n\n");
|
Line 306... |
Line 306... |
GEN ("\n/* Function calls */\n");
|
GEN ("\n/* Function calls */\n");
|
GEN ("output [31:0] fr3_o");
|
GEN ("output [31:0] fr3_o");
|
for (i = 1; i < 6; i++) GEN (", fr%i_o", i + 3);
|
for (i = 1; i < 6; i++) GEN (", fr%i_o", i + 3);
|
GEN (";\n");
|
GEN (";\n");
|
GEN ("input [31:0] fr11_i;\n");
|
GEN ("input [31:0] fr11_i;\n");
|
if (log2(f->nfdeps) > 0) GEN ("output [%i:0] fid_o;\n", log2(f->nfdeps));
|
if (log2_int(f->nfdeps) > 0) GEN ("output [%i:0] fid_o;\n", log2_int(f->nfdeps));
|
GEN ("output fstart_o;\n");
|
GEN ("output fstart_o;\n");
|
GEN ("input fend_i;\n");
|
GEN ("input fend_i;\n");
|
}
|
}
|
|
|
/* Count loads & stores */
|
/* Count loads & stores */
|
Line 648... |
Line 648... |
GEN ("always @(posedge clk or posedge rst)\n");
|
GEN ("always @(posedge clk or posedge rst)\n");
|
GEN ("begin\n");
|
GEN ("begin\n");
|
GEN (" if (rst) begin\n");
|
GEN (" if (rst) begin\n");
|
GEN (" f_stb <= #Tp %i'h0;\n", nstores);
|
GEN (" f_stb <= #Tp %i'h0;\n", nstores);
|
for (i = 0; i < 6; i++) GEN (" fr%i_o <= #Tp 32'h0;\n", i + 3);
|
for (i = 0; i < 6; i++) GEN (" fr%i_o <= #Tp 32'h0;\n", i + 3);
|
if (log2(ncalls)) GEN (" fid_o <= #Tp %i'h0;\n", log2 (f->nfdeps));
|
if (log2_int(ncalls)) GEN (" fid_o <= #Tp %i'h0;\n", log2_int (f->nfdeps));
|
GEN (" fstart_o <= #Tp 1'b0;\n");
|
GEN (" fstart_o <= #Tp 1'b0;\n");
|
//GEN (" f11_r <= #Tp 32'h0;\n");
|
//GEN (" f11_r <= #Tp 32'h0;\n");
|
GEN (" end else begin\n");
|
GEN (" end else begin\n");
|
cucdebug (1, "calls \n");
|
cucdebug (1, "calls \n");
|
for (i = 0; i < f->nmsched; i++) if (f->mtype[i] & MT_CALL) {
|
for (i = 0; i < f->nmsched; i++) if (f->mtype[i] & MT_CALL) {
|
Line 664... |
Line 664... |
print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
|
print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
|
GEN (") begin\n");
|
GEN (") begin\n");
|
print_turn_off_dep (fo, f, dep);
|
print_turn_off_dep (fo, f, dep);
|
GEN (" f_stb[%i] <= #Tp 1'b1;\n", cur_call++);
|
GEN (" f_stb[%i] <= #Tp 1'b1;\n", cur_call++);
|
GEN (" fstart_o <= #Tp 1'b1;\n");
|
GEN (" fstart_o <= #Tp 1'b1;\n");
|
if (log2 (f->nfdeps))
|
if (log2_int (f->nfdeps))
|
GEN (" fid_o <= #Tp %i'h%x;\n", log2 (f->nfdeps), func_index (f, f->msched[i]));
|
GEN (" fid_o <= #Tp %i'h%x;\n", log2_int (f->nfdeps), func_index (f, f->msched[i]));
|
|
|
for (j = 0; j < 6; j++)
|
for (j = 0; j < 6; j++)
|
GEN (" fr%i_o <= #Tp t%x_%x;\n", j + 3,
|
GEN (" fr%i_o <= #Tp t%x_%x;\n", j + 3,
|
REF_BB (f->msched[i]), REF_I (f->msched[i]) - 6 + i);
|
REF_BB (f->msched[i]), REF_I (f->msched[i]) - 6 + i);
|
GEN (" end\n");
|
GEN (" end\n");
|
Line 884... |
Line 884... |
|
|
/* Store/load Wishbone bridge */
|
/* Store/load Wishbone bridge */
|
for (j = 0; j < 2; j++) {
|
for (j = 0; j < 2; j++) {
|
char t = j ? 's' : 'l';
|
char t = j ? 's' : 'l';
|
GEN ("\n/* %s Wishbone bridge */\n", j ? "store" : "load");
|
GEN ("\n/* %s Wishbone bridge */\n", j ? "store" : "load");
|
GEN ("reg [%i:0] %cm_sel;\n", log2 (nrf), t);
|
GEN ("reg [%i:0] %cm_sel;\n", log2_int (nrf), t);
|
GEN ("reg [%i:0] %cm_bid;\n", log2 (nrf), t);
|
GEN ("reg [%i:0] %cm_bid;\n", log2_int (nrf), t);
|
GEN ("reg %ccyc_ip;\n\n", t);
|
GEN ("reg %ccyc_ip;\n\n", t);
|
GEN ("always @(posedge clk)\n");
|
GEN ("always @(posedge clk)\n");
|
GEN ("begin\n");
|
GEN ("begin\n");
|
GEN (" %c_we_o <= #Tp 1'b%i;\n", t, j);
|
GEN (" %c_we_o <= #Tp 1'b%i;\n", t, j);
|
GEN (" %c_cyc_o <= #Tp |i_%c_req;\n", t, t);
|
GEN (" %c_cyc_o <= #Tp |i_%c_req;\n", t, t);
|
Line 899... |
Line 899... |
GEN ("\n/* highest bid */\n");
|
GEN ("\n/* highest bid */\n");
|
GEN ("always @(");
|
GEN ("always @(");
|
for (i = 0; i < nrf; i++) GEN ("%si_%c_req", i > 0 ? " or " : "", t);
|
for (i = 0; i < nrf; i++) GEN ("%si_%c_req", i > 0 ? " or " : "", t);
|
GEN (")\n");
|
GEN (")\n");
|
for (i = 0; i < nrf; i++) GEN (" %sif (i_%c_req) %cm_bid = %i'h%x;\n",
|
for (i = 0; i < nrf; i++) GEN (" %sif (i_%c_req) %cm_bid = %i'h%x;\n",
|
i ? "else " : "", t, t, log2 (nrf) + 1, i);
|
i ? "else " : "", t, t, log2_int (nrf) + 1, i);
|
|
|
GEN ("\n/* selected transfer */\n");
|
GEN ("\n/* selected transfer */\n");
|
GEN ("always @(posedge clk or posedge rst)\n");
|
GEN ("always @(posedge clk or posedge rst)\n");
|
GEN (" if (rst) %cm_sel <= #Tp %i'h0;\n", t, log2 (nrf) + 1);
|
GEN (" if (rst) %cm_sel <= #Tp %i'h0;\n", t, log2_int (nrf) + 1);
|
GEN (" else if (%c_rdy_i) %cm_sel <= #Tp %i'h0;\n", t, t, log2 (nrf) + 1);
|
GEN (" else if (%c_rdy_i) %cm_sel <= #Tp %i'h0;\n", t, t, log2_int (nrf) + 1);
|
GEN (" else if (!%ccyc_ip) %cm_sel <= #Tp %cm_bid;\n", t, t, t);
|
GEN (" else if (!%ccyc_ip) %cm_sel <= #Tp %cm_bid;\n", t, t, t);
|
|
|
GEN ("\n/* Cycle */\n");
|
GEN ("\n/* Cycle */\n");
|
GEN ("\nalways @(posedge clk or posedge rst)\n");
|
GEN ("\nalways @(posedge clk or posedge rst)\n");
|
GEN (" if (rst) %ccyc_ip <= #Tp 1'b0;\n", t);
|
GEN (" if (rst) %ccyc_ip <= #Tp 1'b0;\n", t);
|
Line 964... |
Line 964... |
GEN ("end\n\n");
|
GEN ("end\n\n");
|
|
|
/* start/end signals */
|
/* start/end signals */
|
GEN ("\n\n/* start/end signals */\n");
|
GEN ("\n\n/* start/end signals */\n");
|
for (i = 0; i < nrf; i++) {
|
for (i = 0; i < nrf; i++) {
|
if (log2 (maxncallees + 1))
|
if (log2_int (maxncallees + 1))
|
GEN ("wire [%i:0] i%i_current = i%i_busy ? i%i_current_r : i%i_start_bid;\n",
|
GEN ("wire [%i:0] i%i_current = i%i_busy ? i%i_current_r : i%i_start_bid;\n",
|
log2 (maxncallees + 1), i, i, i, i, i);
|
log2_int (maxncallees + 1), i, i, i, i, i);
|
else GEN ("wire i%i_current = 0;\n", i);
|
else GEN ("wire i%i_current = 0;\n", i);
|
}
|
}
|
GEN ("\n");
|
GEN ("\n");
|
|
|
for (i = 0, j = 0; i < nfuncs; i++) if (f[i]) {
|
for (i = 0, j = 0; i < nfuncs; i++) if (f[i]) {
|
if (log2 (ncallees[i])) {
|
if (log2_int (ncallees[i])) {
|
GEN ("reg [%i:0] i%i_start_bid;\n", log2 (ncallees[i]), j);
|
GEN ("reg [%i:0] i%i_start_bid;\n", log2_int (ncallees[i]), j);
|
GEN ("always @(start%i", f[i]->tmp);
|
GEN ("always @(start%i", f[i]->tmp);
|
for (j = 0, first = 1; j < f[i]->nfdeps; j++)
|
for (j = 0, first = 1; j < f[i]->nfdeps; j++)
|
if (f[i]->fdeps[j]) GEN (", ");
|
if (f[i]->fdeps[j]) GEN (", ");
|
GEN (")\n");
|
GEN (")\n");
|
GEN ("begin !!!\n"); //TODO
|
GEN ("begin !!!\n"); //TODO
|