| Line 31... |
Line 31... |
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include "config.h"
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#ifdef HAVE_INTTYPES_H
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#include <inttypes.h>
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#endif
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#include "port.h"
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#include "arch.h"
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#include "debug_unit.h"
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#include "debug_unit.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "except.h"
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#include "except.h"
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#include "arch.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "parse.h"
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#include "parse.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "gdb.h"
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#include "gdb.h"
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#include "except.h"
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#include "except.h"
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| Line 80... |
Line 87... |
/* Do not stop, if we have debug module disabled or during reset */
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/* Do not stop, if we have debug module disabled or during reset */
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if(!config.debug.enabled || in_reset)
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if(!config.debug.enabled || in_reset)
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return 0;
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return 0;
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/* If we're single stepping, always stop */
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/* If we're single stepping, always stop */
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if(action == DebugInstructionFetch && testsprbits (SPR_DMR1, SPR_DMR1_ST))
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if((action == DebugInstructionFetch) && testsprbits (SPR_DMR1, SPR_DMR1_ST))
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return 1;
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return 1;
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/* is any watchpoint enabled to generate a break or count? If not, ignore */
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/* is any watchpoint enabled to generate a break or count? If not, ignore */
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if(mfspr(SPR_DMR2) & (SPR_DMR2_WGB|SPR_DMR2_AWTC))
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if(mfspr(SPR_DMR2) & (SPR_DMR2_WGB|SPR_DMR2_AWTC))
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return calculate_watchpoints(action, udata);
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return calculate_watchpoints(action, udata);
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| Line 244... |
Line 251... |
fflush(stdout);
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fflush(stdout);
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#endif
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#endif
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switch(current_scan_chain)
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switch(current_scan_chain)
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{
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{
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case JTAG_CHAIN_DEBUG_UNIT:
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case JTAG_CHAIN_DEBUG_UNIT:
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debug (2, "WRITE (%08x) = %08x\n", address, data);
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debug (2, "WRITE (%08x) = %08lx\n", address, data);
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if (runtime.sim.fspr_log) {
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08X] <- [%08lX]\n",
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08X] <- [%08lX]\n",
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address, data);
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address, data);
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}
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}
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mtspr(address, data);
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mtspr(address, data);
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| Line 378... |
Line 385... |
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/* Writes to bus address */
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/* Writes to bus address */
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int debug_set_mem (unsigned int address,unsigned long data)
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int debug_set_mem (unsigned int address,unsigned long data)
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{
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{
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int err = 0;
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int err = 0;
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debug (2, "MEMWRITE (%08x) = %08x\n", address, data);
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debug (2, "MEMWRITE (%08x) = %08lx\n", address, data);
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if(!verify_memoryarea(address))
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if(!verify_memoryarea(address))
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err = JTAG_PROXY_INVALID_ADDRESS;
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err = JTAG_PROXY_INVALID_ADDRESS;
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else {
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else {
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| Line 401... |
Line 408... |
err = JTAG_PROXY_INVALID_ADDRESS;
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err = JTAG_PROXY_INVALID_ADDRESS;
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else
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else
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{
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{
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*data=simmem_read_word(address);
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*data=simmem_read_word(address);
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}
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}
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debug (2, "MEMREAD (%08x) = %08x\n", address, *data);
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debug (2, "MEMREAD (%08x) = %08lx\n", address, *data);
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return err;
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return err;
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}
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}
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/* debug_ignore_exception returns 1 if the exception should be ignored. */
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/* debug_ignore_exception returns 1 if the exception should be ignored. */
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int debug_ignore_exception (unsigned long except)
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int debug_ignore_exception (unsigned long except)
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