| Line 29... |
Line 29... |
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include "config.h"
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#ifdef HAVE_INTTYPES_H
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#include <inttypes.h>
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#endif
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#include "port.h"
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#include "arch.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "16450.h"
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#include "16450.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "pic.h"
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#include "pic.h"
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#include "vapi.h"
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#include "vapi.h"
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Line 76... |
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return char_clks * bauds_per_char;
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return char_clks * bauds_per_char;
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}
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}
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/* Set a specific UART register with value. */
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/* Set a specific UART register with value. */
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void uart_write_byte(unsigned long addr, unsigned long value)
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void uart_write_byte(oraddr_t addr, uint32_t value)
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{
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{
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int chipsel;
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int chipsel;
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debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
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debug(4, "uart_write_byte(%"PRIxADDR",%02"PRIx32")\n", addr, value);
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for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
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for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
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if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
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if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
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break;
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break;
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if (chipsel >= MAX_UARTS) return;
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if (chipsel >= MAX_UARTS) return;
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| Line 143... |
Line 151... |
debug(1, "write out of range (addr %x)\n", addr);
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debug(1, "write out of range (addr %x)\n", addr);
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}
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}
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}
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}
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/* Read a specific UART register. */
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/* Read a specific UART register. */
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unsigned long uart_read_byte(unsigned long addr)
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uint32_t uart_read_byte(oraddr_t addr)
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{
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{
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unsigned char value = 0;
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uint8_t value = 0;
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int chipsel;
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int chipsel;
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debug(4, "uart_read_byte(%x)", addr);
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debug(4, "uart_read_byte(%"PRIxADDR")", addr);
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for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
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for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
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if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
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if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
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break;
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break;
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Line 169... |
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if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
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if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
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switch (addr % UART_ADDR_SPACE) {
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switch (addr % UART_ADDR_SPACE) {
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case UART_DLL:
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case UART_DLL:
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value = uarts[chipsel].regs.dll;
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value = uarts[chipsel].regs.dll;
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debug(4, "= %x\n", value);
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debug(4, "= %"PRIx8"\n", value);
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return value;
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return value;
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case UART_DLH:
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case UART_DLH:
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value = uarts[chipsel].regs.dlh;
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value = uarts[chipsel].regs.dlh;
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debug(4, "= %x\n", value);
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debug(4, "= %"PRIx8"\n", value);
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return value;
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return value;
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}
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}
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}
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}
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switch (addr % UART_ADDR_SPACE) {
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switch (addr % UART_ADDR_SPACE) {
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Line 229... |
break;
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break;
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case UART_SCR:
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case UART_SCR:
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value = uarts[chipsel].regs.scr;
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value = uarts[chipsel].regs.scr;
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break;
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break;
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default:
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default:
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debug(1, "read out of range (addr %x)\n", addr);
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debug(1, "read out of range (addr %"PRIxADDR")\n", addr);
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}
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}
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debug(4, " = %x\n", value);
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debug(4, " = %"PRIx8"\n", value);
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return value;
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return value;
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}
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}
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/* Function that handles incoming VAPI data. */
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/* Function that handles incoming VAPI data. */
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void uart_vapi_read (unsigned long id, unsigned long data)
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void uart_vapi_read (unsigned long id, unsigned long data)
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{
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{
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int uart;
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int uart;
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debug(4, "UART: id %08x, data %08x\n", id, data);
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debug(4, "UART: id %08lx, data %08lx\n", id, data);
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uart = id & VAPI_DEVICE_ID;
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uart = id & VAPI_DEVICE_ID;
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uarts[uart].vapi_buf[uarts[uart].vapi_buf_head_ptr] = data;
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uarts[uart].vapi_buf[uarts[uart].vapi_buf_head_ptr] = data;
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uarts[uart].vapi_buf_head_ptr = (uarts[uart].vapi_buf_head_ptr + 1) % UART_VAPI_BUF_LEN;
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uarts[uart].vapi_buf_head_ptr = (uarts[uart].vapi_buf_head_ptr + 1) % UART_VAPI_BUF_LEN;
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if (uarts[uart].vapi_buf_tail_ptr == uarts[uart].vapi_buf_head_ptr) {
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if (uarts[uart].vapi_buf_tail_ptr == uarts[uart].vapi_buf_head_ptr) {
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fprintf (stderr, "FATAL: uart VAPI buffer to small.\n");
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fprintf (stderr, "FATAL: uart VAPI buffer to small.\n");
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| Line 243... |
Line 251... |
}
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}
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}
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}
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static void send_char (int uart, int bits_send)
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static void send_char (int uart, int bits_send)
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{
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{
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PRINTF ("%c", uarts[uart].iregs.txser);
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PRINTF ("%c", (char)uarts[uart].iregs.txser);
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debug(4, "TX \'%c\' via UART%d...\n", uarts[uart].iregs.txser, uart);
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debug(4, "TX \'%c\' via UART%d...\n", (char)uarts[uart].iregs.txser, uart);
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if (uarts[uart].regs.mcr & UART_MCR_LOOP)
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if (uarts[uart].regs.mcr & UART_MCR_LOOP)
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uarts[uart].iregs.loopback = uarts[uart].iregs.txser;
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uarts[uart].iregs.loopback = uarts[uart].iregs.txser;
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else {
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else {
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/* Send to either VAPI or to file */
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/* Send to either VAPI or to file */
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if (config.uarts[uart].vapi_id) {
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if (config.uarts[uart].vapi_id) {
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| Line 305... |
Line 313... |
fe |= ((packet >> (nbits++)) & 1) ^ 1;
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fe |= ((packet >> (nbits++)) & 1) ^ 1;
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debug (4, "lcr vapi %02x, uart %02x\n", uarts[uart].vapi.lcr, uarts[uart].regs.lcr);
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debug (4, "lcr vapi %02x, uart %02x\n", uarts[uart].vapi.lcr, uarts[uart].regs.lcr);
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data |= (uarts[uart].vapi.lcr << 8) | (pe << 16) | (fe << 17) | (uarts[uart].vapi.lcr << 8);
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data |= (uarts[uart].vapi.lcr << 8) | (pe << 16) | (fe << 17) | (uarts[uart].vapi.lcr << 8);
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PRINTF ("vapi_send (%08lx, %08x)\n", config.uarts[uart].vapi_id, data);
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PRINTF ("vapi_send (%08lx, %08x)\n", config.uarts[uart].vapi_id, data);
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debug (4, "vapi_send (%08x, %08x)\n", config.uarts[uart].vapi_id, data);
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debug (4, "vapi_send (%08lx, %08x)\n", config.uarts[uart].vapi_id, data);
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vapi_send (config.uarts[uart].vapi_id, data);
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vapi_send (config.uarts[uart].vapi_id, data);
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} else {
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} else {
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char buffer[1] = { uarts[uart].iregs.txser & 0xFF };
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char buffer[1] = { uarts[uart].iregs.txser & 0xFF };
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channel_write(channels[uart], buffer, 1);
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channel_write(channels[uart], buffer, 1);
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}
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}
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Line 430... |
} else {
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} else {
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if (uarts[i].istat.rxser_full) {
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if (uarts[i].istat.rxser_full) {
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if (uarts[i].char_clks <= uarts[i].istat.rxser_clks++) {
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if (uarts[i].char_clks <= uarts[i].istat.rxser_clks++) {
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/* Set unused character bits to zero and allow lsr register in fifo */
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/* Set unused character bits to zero and allow lsr register in fifo */
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uarts[i].iregs.rxser &= ((1 << ((uarts[i].regs.lcr & 3) + 5)) - 1) | 0xff00;
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uarts[i].iregs.rxser &= ((1 << ((uarts[i].regs.lcr & 3) + 5)) - 1) | 0xff00;
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debug(4, "Receiving 0x%02x'%c' via UART%d...\n", uarts[i].iregs.rxser,
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debug(4, "Receiving 0x%02lx'%c' via UART%d...\n", uarts[i].iregs.rxser,
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uarts[i].iregs.rxser, i);
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(char)uarts[i].iregs.rxser, i);
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PRINTF ("%c", uarts[i].iregs.rxser);
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PRINTF ("%c", (char)uarts[i].iregs.rxser);
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uarts[i].istat.rxser_full = 0;
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uarts[i].istat.rxser_full = 0;
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uarts[i].istat.rxser_clks = 0;
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uarts[i].istat.rxser_clks = 0;
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uart_add_char (i, uarts[i].iregs.rxser);
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uart_add_char (i, uarts[i].iregs.rxser);
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}
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}
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}
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}
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| Line 460... |
Line 468... |
/* do not handle commands while receiving */
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/* do not handle commands while receiving */
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if (uarts[i].istat.rxser_full) return;
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if (uarts[i].istat.rxser_full) return;
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while (!received) {
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while (!received) {
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if (uarts[i].vapi_buf_head_ptr != uarts[i].vapi_buf_tail_ptr) {
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if (uarts[i].vapi_buf_head_ptr != uarts[i].vapi_buf_tail_ptr) {
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unsigned long data = uarts[i].vapi_buf[uarts[i].vapi_buf_tail_ptr];
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unsigned long data = uarts[i].vapi_buf[uarts[i].vapi_buf_tail_ptr];
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debug(4, "Handling: %08x (%i,%i)\n", data, uarts[i].vapi_buf_head_ptr, uarts[i].vapi_buf_tail_ptr);
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debug(4, "Handling: %08lx (%i,%i)\n", data, uarts[i].vapi_buf_head_ptr, uarts[i].vapi_buf_tail_ptr);
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uarts[i].vapi_buf_tail_ptr = (uarts[i].vapi_buf_tail_ptr + 1) % UART_VAPI_BUF_LEN;
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uarts[i].vapi_buf_tail_ptr = (uarts[i].vapi_buf_tail_ptr + 1) % UART_VAPI_BUF_LEN;
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switch (data >> 24) {
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switch (data >> 24) {
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case 0x00:
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case 0x00:
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uarts[i].vapi.lcr = (data >> 8) & 0xff;
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uarts[i].vapi.lcr = (data >> 8) & 0xff;
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/* Put data into rx fifo */
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/* Put data into rx fifo */
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| Line 495... |
Line 503... |
case 0x04:
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case 0x04:
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uarts[i].vapi.next_break_cnt = data & 0xffff;
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uarts[i].vapi.next_break_cnt = data & 0xffff;
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uarts[i].vapi.next_break = (data >> 16) & 1;
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uarts[i].vapi.next_break = (data >> 16) & 1;
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break;
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break;
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default:
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default:
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debug (0, "WARNING: Invalid vapi command %02x\n", data >> 24);
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debug (0, "WARNING: Invalid vapi command %02lx\n", data >> 24);
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break;
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break;
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}
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}
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} else break;
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} else break;
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}
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}
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}
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}
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