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Line 29... |
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include "abstract.h"
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#include "16450.h"
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#include "16450.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "pic.h"
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#include "pic.h"
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static struct dev_16450 uarts[NR_UARTS];
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static struct dev_16450 uarts[NR_UARTS];
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| Line 59... |
Line 60... |
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uarts[uartchip].char_clks *= bauds_per_char;
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uarts[uartchip].char_clks *= bauds_per_char;
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}
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}
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/* Set a specific UART register with value. */
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/* Set a specific UART register with value. */
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void uart_write(unsigned long addr, unsigned long value)
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void uart_write8(unsigned long addr, unsigned char value)
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{
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{
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int chipsel;
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int chipsel;
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debug("uart_write(%x,%x)\n", addr, (value >> 24));
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debug("uart_write8(%x,%02x)\n", addr, (unsigned)value);
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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break;
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break;
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else if (chipsel == NR_UARTS)
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else if (chipsel == NR_UARTS)
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return;
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return;
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if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
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if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
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switch (addr % UART_ADDR_SPACE) {
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switch (addr % UART_ADDR_SPACE) {
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case UART_DLL:
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case UART_DLL:
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uarts[chipsel].regs.dll = (value >> 24);
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uarts[chipsel].regs.dll = value;
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break;
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break;
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case UART_DLH:
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case UART_DLH:
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uarts[chipsel].regs.dlh = (value >> 24);
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uarts[chipsel].regs.dlh = value;
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break;
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break;
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case UART_LCR:
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case UART_LCR:
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uarts[chipsel].regs.lcr = (value >> 24) & UART_VALID_LCR;
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uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
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break;
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break;
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default:
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default:
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debug("write out of range (addr %x, DLAB=1)\n", addr);
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debug("write out of range (addr %x, DLAB=1)\n", addr);
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}
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}
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set_char_clks(chipsel);
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set_char_clks(chipsel);
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return;
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return;
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}
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}
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switch (addr % UART_ADDR_SPACE) {
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switch (addr % UART_ADDR_SPACE) {
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case UART_TXBUF:
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case UART_TXBUF:
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uarts[chipsel].regs.txbuf = (value >> 24);
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uarts[chipsel].regs.txbuf = value;
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uarts[chipsel].istat.txbuf = FULL;
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uarts[chipsel].istat.txbuf = FULL;
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uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
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uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
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uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
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uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
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uarts[chipsel].istat.thre_int = 0;
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uarts[chipsel].istat.thre_int = 0;
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break;
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break;
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case UART_IER:
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case UART_IER:
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uarts[chipsel].regs.ier = (value >> 24) & UART_VALID_IER;
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uarts[chipsel].regs.ier = value & UART_VALID_IER;
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break;
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break;
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case UART_LCR:
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case UART_LCR:
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uarts[chipsel].regs.lcr = (value >> 24) & UART_VALID_LCR;
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uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
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break;
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break;
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case UART_MCR:
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case UART_MCR:
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uarts[chipsel].regs.mcr = (value >> 24) & UART_VALID_MCR;
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uarts[chipsel].regs.mcr = value & UART_VALID_MCR;
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break;
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break;
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case UART_SCR:
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case UART_SCR:
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uarts[chipsel].regs.scr = (value >> 24);
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uarts[chipsel].regs.scr = value;
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break;
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break;
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default:
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default:
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debug("write out of range (addr %x)\n", addr);
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debug("write out of range (addr %x)\n", addr);
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}
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}
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set_char_clks(chipsel);
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set_char_clks(chipsel);
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return;
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return;
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}
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}
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/* Read a specific UART register. */
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/* Read a specific UART register. */
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unsigned long uart_read(unsigned long addr)
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unsigned char uart_read8(unsigned long addr)
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{
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{
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unsigned char value = 0;
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unsigned char value = 0;
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int chipsel;
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int chipsel;
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debug("uart_read(%x)\n", addr);
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debug("uart_read8(%x)\n", addr);
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
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break;
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break;
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else if (chipsel == NR_UARTS)
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else if (chipsel == NR_UARTS)
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| Line 141... |
Line 142... |
value = uarts[chipsel].regs.dlh;
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value = uarts[chipsel].regs.dlh;
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break;
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break;
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default:
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default:
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debug("read out of range (addr %x, DLAB=1)\n", addr);
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debug("read out of range (addr %x, DLAB=1)\n", addr);
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}
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}
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return (value << 24);
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return value;
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}
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}
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switch (addr % UART_ADDR_SPACE) {
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switch (addr % UART_ADDR_SPACE) {
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case UART_RXBUF:
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case UART_RXBUF:
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value = uarts[chipsel].regs.rxbuf;
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value = uarts[chipsel].regs.rxbuf;
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Line 180... |
value = uarts[chipsel].regs.scr;
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value = uarts[chipsel].regs.scr;
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break;
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break;
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default:
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default:
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debug("read out of range (addr %x)\n", addr);
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debug("read out of range (addr %x)\n", addr);
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}
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}
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return (value << 24);
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return value;
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}
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}
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/* Reset. It initializes all registers of all UART devices to zero values,
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/* Reset. It initializes all registers of all UART devices to zero values,
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(re)opens all RX/TX file streams and places devices in memory address
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(re)opens all RX/TX file streams and places devices in memory address
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space. */
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space. */
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Line 207... |
if (uarts[i].txfs && uarts[i].txfs) {
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if (uarts[i].txfs && uarts[i].txfs) {
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printf("UART%d at 0x%.8x uses ", i, uarts[i].baseaddr);
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printf("UART%d at 0x%.8x uses ", i, uarts[i].baseaddr);
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printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
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printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
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} else
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} else
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printf("UART%d has problems with TX file stream.\n", i);
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printf("UART%d has problems with TX file stream.\n", i);
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register_memoryarea(uarts[i].baseaddr, UART_ADDR_SPACE, uart_read, uart_write);
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register_memoryarea(uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read8, uart_write8, 0);
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}
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}
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}
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}
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/* Simulation hook. Must be called every clock cycle to simulate all UART
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/* Simulation hook. Must be called every clock cycle to simulate all UART
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devices. It does internal functional UART simulation. */
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devices. It does internal functional UART simulation. */
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Line 319... |
void uart_status()
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void uart_status()
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{
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{
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int i;
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int i;
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for(i = 0; i < NR_UARTS; i++) {
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for(i = 0; i < NR_UARTS; i++) {
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/* if (!uarts[i].txfs)
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if ( !uarts[i].baseaddr )
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continue;
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continue;
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*/
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printf("\nUART%d visible registers at 0x%.8x:\n", i, uarts[i].baseaddr);
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printf("\nUART%d visible registers at 0x%.8x:\n", i, uarts[i].baseaddr);
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printf("RXBUF: %.2x TXBUF: %.2x\n", uarts[i].regs.rxbuf, uarts[i].regs.txbuf);
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printf("RXBUF: %.2x TXBUF: %.2x\n", uarts[i].regs.rxbuf, uarts[i].regs.txbuf);
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printf("DLL : %.2x DLH : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
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printf("DLL : %.2x DLH : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
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printf("IER : %.2x IIR : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
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printf("IER : %.2x IIR : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
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printf("LCR : %.2x MCR : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
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printf("LCR : %.2x MCR : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
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