URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [peripheral/] [mc.c] - Diff between revs 1358 and 1359

Rev 1358	Rev 1359
Line 74...	Line 74...
`mem_dev = mem_dev->next;`	`mem_dev = mem_dev->next;`
`}`	`}`
`}`	`}`

`/* Set a specific MC register with value. */`	`/* Set a specific MC register with value. */`
`void mc_write_word(oraddr_t addr, uint32_t value)`	`void mc_write_word(oraddr_t addr, uint32_t value, void *dat)`
`{`	`{`
`int chipsel;`	`int chipsel;`

`debug(5, "mc_write_word(%"PRIxADDR",%08"PRIx32")\n", addr, value);`	`debug(5, "mc_write_word(%"PRIxADDR",%08"PRIx32")\n", addr, value);`

Line 110...	Line 110...
`debug(1, "write out of range (addr %"PRIxADDR")\n", addr + config.mc.baseaddr);`	`debug(1, "write out of range (addr %"PRIxADDR")\n", addr + config.mc.baseaddr);`
`}`	`}`
`}`	`}`

`/* Read a specific MC register. */`	`/* Read a specific MC register. */`
`uint32_t mc_read_word(oraddr_t addr)`	`uint32_t mc_read_word(oraddr_t addr, void *dat)`
`{`	`{`
`uint32_t value = 0;`	`uint32_t value = 0;`

`debug(5, "mc_read_word(%"PRIxADDR")", addr);`	`debug(5, "mc_read_word(%"PRIxADDR")", addr);`

Line 174...	Line 174...
`mem_dev = mem_dev->next;`	`mem_dev = mem_dev->next;`
`}`	`}`

`set_csc_tms (0, mc.csc[0], mc.tms[0]);`	`set_csc_tms (0, mc.csc[0], mc.tms[0]);`

`register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word);`	`register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word, NULL);`
`}`	`}`
`}`	`}`

`inline void mc_clock()`	`inline void mc_clock()`
`{`	`{`